ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 237
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 237 of 367
- Download datasheet (7Mb)
18.6
18.6.1
7647G–AVR–09/11
ADC Noise Canceler
Analog Input Circuitry
If the user has a fixed voltage source connected to the AREF pin, the user may not use the
other reference voltage options in the application, as they will be shorted to the external volt-
age. If no external voltage is applied to the AREF pin, the user may switch between AV
2.56V as reference selection. The first ADC conversion result after switching reference voltage
source may be inaccurate, and the user is advised to discard this result.
AREF pin is alternate function with ISRC Current Source output. When current source is
selected, the AREF pin is not connected to the internal reference voltage network. See ARE-
FEN and ISRCEN bits in Section “ADC Control and Status Register B– ADCSRB”, page 247.
If differential channels are used, the selected reference should not be closer to AV
cated in
The ADC features a noise canceler that enables conversion during sleep mode to reduce
noise induced from the CPU core and other I/O peripherals. The noise canceler can be used
with ADC Noise Reduction and Idle mode. To make use of this feature, the following proce-
dure should be used:
Note that the ADC will not be automatically turned off when entering other sleep modes than
Idle mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before
entering such sleep modes to avoid excessive power consumption.
If the ADC is enabled in such sleep modes and the user wants to perform differential conver-
sions, the user is advised to switch the ADC off and on after waking up from sleep to prompt
an extended conversion to get a valid result.
The analog input circuitry for single ended channels is illustrated in Figure 18-8. An analog
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin,
regardless of whether that channel is selected as input for the ADC. When the channel is
selected, the source must drive the S/H capacitor through the series resistance (combined
resistance in the input path).
The ADC is optimized for analog signals with an output impedance of approximately 10k or
less. If such a source is used, the sampling time will be negligible. If a source with higher
impedance is used, the sampling time will depend on how long time the source needs to
charge the S/H capacitor, with can vary widely. The user is recommended to only use low
impedant sources with slowly varying signals, since this minimizes the required charge trans-
fer to the S/H capacitor.
a. Make sure the ADATE bit is reset.
b. Make sure that the ADC is enabled and is not busy converting. Single Conversion
c. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conver-
d. If no other interrupts occur before the ADC conversion completes, the ADC inter-
Table 26-5 on page
mode must be selected and the ADC conversion complete interrupt must be
enabled.
sion once the CPU has been halted.
rupt will wake up the CPU and execute the ADC Conversion Complete interrupt
routine. If another interrupt wakes up the CPU before the ADC conversion is com-
plete, that interrupt will be executed, and an ADC Conversion Complete interrupt
request will be generated when the ADC conversion completes. The CPU will
remain in active mode until a new sleep command is executed.
322.
Atmel ATmega16/32/64/M1/C1
CC
than indi-
CC
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237
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