ATmega64RZAPV Atmel Corporation, ATmega64RZAPV Datasheet - Page 18

• Manufacturer Part Number: ATmega64RZAPV
• Manufacturer: Atmel Corporation

Specifications of ATmega64RZAPV

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: No
• External Pa Control: No
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 16.0
• Transmit Current Consumption (ma): 17.0
• Link Budget (dbm): 104

5. AVR Memories
5.1
5.2
8011O–AVR–07/10
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega164P/324P/644P. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega164P/324P/644P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega164P/324P/644P contains 16K/32K/64K bytes On-chip In-System Reprogramma-
ble Flash memory for program storage. Since all AVR instructions are 16 bits or 32 bits wide, the
Flash is organized as 32/64 x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega164P/324P/644P Program Counter (PC) is 15/16 bits wide, thus addressing the 32/64K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
”Memory Programming” on page 293
loading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
14.
contains a detailed description on Flash data serial down-
ATmega164P/324P/644P
”Memory Programming” on page
”Instruction Execution Tim-
293.
18