ATtiny5 Atmel Corporation, ATtiny5 Datasheet - Page 108

• Manufacturer Part Number: ATtiny5
• Manufacturer: Atmel Corporation

Specifications of ATtiny5

• Flash (kbytes): 0.5 Kbytes
• Pin Count: 6
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 1
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 4
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 8
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.03
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 2
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

15. Memory Programming
15.1
15.2
108
Features
Overview
ATtiny4/5/9/10
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The Non-Volatile Memory (NVM) Controller manages all access to the Non-Volatile Memories.
The NVM Controller controls all NVM timing and access privileges, and holds the status of the
NVM.
During normal execution the CPU will execute code from the code section of the Flash memory
(program memory). When entering sleep and no programming operations are active, the Flash
memory is disabled to minimize power consumption.
All NVM are mapped to the data memory. Application software can read the NVM from the
mapped locations of data memory using load instruction with indirect addressing.
The NVM has only one read port and, therefore, the next instruction and the data can not be
read simultaneously. When the application reads data from NVM locations mapped to the data
space, the data is read first before the next instruction is fetched. The CPU execution is here
delayed by one system clock cycle.
Internal programming operations to NVM have been disabled and the NVM therefore appears to
the application software as read-only. Internal write or erase operations of the NVM will not be
successful.
The method used by the external programmer for writing the Non-Volatile Memories is referred
to as external programming. External programming can be done both in-system or in mass pro-
duction. See
via the Tiny Programming Interface (TPI).
In the external programming mode all NVM can be read and programmed, except the signature
and the calibration sections which are read-only.
NVM can be programmed at 5V, only.
Two Embedded Non-Volatile Memories:
Four Separate Sections Inside Flash Memory:
Read Access to All Non-Volatile Memories from Application Software
Read and Write Access to Non-Volatile Memories from External programmer:
External Programming:
High Security with NVM Lock Bits
– Non-Volatile Memory Lock bits (NVM Lock bits)
– Flash Memory
– Code Section (Program Memory)
– Signature Section
– Configuration Section
– Calibration Section
– Read Access to All Non-Volatile Memories
– Write Access to NVM Lock Bits, Flash Code Section and Flash Configuration Section
– Support for In-System and Mass Production Programming
– Programming Through the Tiny Programming Interface (TPI)
Figure 14-2 on page
98. The external programmer can read and program the NVM
8127E–AVR–11/11