ATtiny5 Atmel Corporation, ATtiny5 Datasheet - Page 94

• Manufacturer Part Number: ATtiny5
• Manufacturer: Atmel Corporation

Specifications of ATtiny5

• Flash (kbytes): 0.5 Kbytes
• Pin Count: 6
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 1
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 4
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 8
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.03
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 2
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

13.12 Register Description
13.12.1
13.12.2
94
ATtiny4/5/9/10
ADMUX
ADCSRA
–
–
ADC Multiplexer Selection Register
ADC Control and Status Register A
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bits 1:0 – MUX1:0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
See
Table 13-2.
If these bits are changed during a conversion, the change will not go in effect until the
conversion is complete (ADIF in ADCSRA is set)
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
• Bit 6 – ADSC: ADC Start Conversion
In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode,
write this bit to one to start the first conversion. The first conversion after ADSC has been written
after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled,
will take 25 ADC clock cycles instead of the normal 13. This first conversion performs initializa-
tion of the ADC.
ADSC will read as one as long as a conversion is in progress. When the conversion is complete,
it returns to zero. Writing zero to this bit has no effect.
• Bit 5 – ADATE: ADC Auto Trigger Enable
When this bit is written to one, Auto Triggering of the ADC is enabled. The ADC will start a con-
version on a positive edge of the selected trigger signal. The trigger source is selected by setting
the ADC Trigger Select bits, ADTS in ADCSRB.
Bit
0x1B
Read/Write
Initial Value
Bit
0x1D
Read/Write
Initial Value
Table 13-2
MUX1
0
1
ADEN
R/W
Input Channel Selections
7
0
R
7
–
0
for details..
ADSC
R/W
6
0
R
6
–
0
ADATE
R/W
5
0
R
5
–
0
MUX0
0
1
0
1
ADIF
R/W
4
0
R
4
–
0
ADIE
R/W
3
0
3
–
R
0
Single Ended Input
ADC0
ADC1
ADC2
ADC3
ADPS2
R/W
2
0
R
2
–
0
ADPS1
R/W
MUX1
1
0
R/W
1
0
ADPS0
R/W
MUX0
0
0
R/W
Pin
PB0
PB1
PB2
PB3
0
0
ADCSRA
ADMUX
8127E–AVR–11/11