SAM3S2B Atmel Corporation, SAM3S2B Datasheet - Page 150
SAM3S2B
Manufacturer Part Number
SAM3S2B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S2B
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.19 About the
150
SAM3S
Cortex-M3
The address map of the Private peripheral bus (PPB) is:
Table 10-26. Core peripheral register regions
In register descriptions:
Address
0xE000E008-
0xE000E00F
0xE000E010-
0xE000E01F
0xE000E100-
0xE000E4EF
0xE000ED00-
0xE000ED3F
0xE000ED90-
0xE000EDB8
0xE000EF00-
0xE000EF03
• the register type is described as follows:
• the required privilege gives the privilege level required to access the register, as follows:
RW
RO
WO
Privileged
Unprivileged
peripherals
Read and write.
Read-only.
Write-only.
Core peripheral
System control block
System timer
Nested Vectored Interrupt
Controller
System control block
Memory protection unit
Nested Vectored Interrupt
Controller
Only privileged software can access the register.
Both unprivileged and privileged software can access the register.
Description
Table 10-30 on page 164
Table 10-33 on page 191
Table 10-27 on page 151
Table 10-30 on page 164
Table 10-35 on page 197
Table 10-27 on page 151
6500C–ATARM–8-Feb-11
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