SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 36
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SAM9261
Manufacturer Part Number
SAM9261
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9261.pdf
(749 pages)
4.SAM9261.pdf
(44 pages)
5.SAM9261.pdf
(1274 pages)
6.SAM9261.pdf
(43 pages)
Specifications of SAM9261
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
160
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
10.8
10.9
10.10 Analog-to-Digital Converter (ADC)
36
High Speed USB Host Port (UHPHS)
USB High Speed Device Port (UDPHS)
SAM9G35
• Compliant with EnhancedHCI Rev 1.0 Specification
• Compliant with OpenHCI Rev 1.0 Specification
• Root Hub Integrated with 3 Downstream USB Ports
• Shared Embedded USB Transceivers
• Embedded one additional USB Full Speed Transceiver
• USB V2.0 high-speed compliant, 480 Mbits per second
• Embedded USB V2.0 UTMI+ high-speed transceiver shared with UHP HS.
• Embedded 4K-byte dual-port RAM for endpoints
• Embedded 6 channels DMA controller
• Suspend/Resume logic
• Up to 2 or 3 banks for isochronous and bulk endpoints
• Seven endpoints:
• 7-channel ADC
• 5-channel to support 4wire and 5-wire resistive Touch Screen
• 10-bit 384 Ksamples/sec. Successive Approximation Register ADC
• -3/+3 LSB Integral Non Linearity, -2/+2 LSB Differential Non Linearity
• Integrated 12-to-1 multiplexer, offering eight independent 3.3V analog inputs
• External voltage reference for better accuracy on low voltage inputs
• Individual enable and disable of each channel
• Multiple trigger sources
• Sleep Mode and conversion sequencer
• Compare level interrupt for background signal surveillance
– Compliant with USB V2.0 High-speed and Full-speed Specification
– Supports Both High-speed 480Mbps and Full-speed 12 Mbps USB devices
– Compliant with USB V2.0 Full-speed and Low-speed Specification
– Supports Both Low-speed 1.5 Mbps and Full-speed 12 Mbps USB devices
– Endpoint 0: 64 bytes, 1 bank mode
– Endpoint 1 & 2: 1024 bytes, DMA, 2 banks mode, HS isochronous capable
– Endpoint 3 & 4:1024 bytes, DMA, 3 banks mode
– Endpoint 5 & 6: 1024 bytes, DMA, 3 banks mode, HS isochronous capable
– Hardware or software trigger
– External trigger pin
– Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
11053AS–ATARM–27-Jul-11