SAM9R64 Atmel Corporation, SAM9R64 Datasheet - Page 74
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SAM9R64
Manufacturer Part Number
SAM9R64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9R64
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
49
Ext Interrupts
49
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
3
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 74 of 248
- Download datasheet (2Mb)
Memory Management Unit
3.2.4
3-10
Section descriptor
31
Bits
Section
[3:2]
-
[1:0]
The two least significant bits of the first-level descriptor indicate the descriptor type as
shown in Table 3-3.
A section descriptor provides the base address of a 1MB block of memory. Figure 3-5
shows the format of a section descriptor.
Section base address
Value
0 0
0 1
1 0
1 1
Copyright © 2001-2003 ARM Limited. All rights reserved.
Coarse
-
[3:2]
[1:0]
Meaning
Invalid
Coarse page table
Section
Fine page table
Fine
-
[3:2]
[1:0]
20 19
Table 3-3 Interpreting first-level descriptor bits [1:0]
Description
Bits C and B indicate whether the area of memory mapped
by this page is treated as write-back cachable, write-through
cachable, noncached buffered, or noncached nonbuffered.
Should Be Zero.
These bits indicate the page size and validity and are
interpreted as shown in Table 3-3.
Generates a section translation fault
Description
Indicates that this is a coarse page table descriptor
Indicates that this is a section descriptor
Indicates that this is a fine page table descriptor
Table 3-2 First-level descriptor bits (continued)
SBZ
12 11 10 9 8
AP
Figure 3-5 Section descriptor
S
B
Z
Domain
5 4 3 2 1 0
1 C B 1
ARM DDI0198D
0
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