SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 18

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
7.2.2
7.2.3
Table 7-3.
7.3
18
Slave
0
1
2
3
4
Peripheral DMA Controller
Internal SRAM
Internal ROM
UHP User Interface
External Bus Interface
Internal Flash
Internal Peripherals
Reserved
AT91SAM9XE128/256/512 Preliminary
Matrix Slaves
Masters to Slaves Access
Masters to Slaves Access
Each Slave has its own arbiter, thus allowing a different arbitration per Slave to be programmed.
Table 7-2.
All the Masters can normally access all the Slaves. However, some paths do not make sense,
such as allowing access from the Ethernet MAC to the internal peripherals.
Thus, these paths are forbidden or simply not wired, and shown as “–” in the following table.
Slave 0
Slave 1
Slave 2
Slave 3
Slave 4
Slave 5
• Acting as one Matrix Master
• Allows data transfers from/to peripheral to/from any memory space without any intervention
• Next Pointer Support, forbids strong real-time constraints on buffer management.
• Twenty-four channels
Master
of the processor.
– Two for each USART
– Two for the Debug Unit
– Two for each Serial Synchronous Controller
– Two for each Serial Peripheral Interface
– Two for the Two Wire Interface
– One for Multimedia Card Interface
– One for Analog To Digital Converter
ARM926 Instruction
List of Bus Matrix Slaves
and Data
0 and 1
X
X
X
X
X
X
Internal SRAM
Internal ROM
USB Host User Interface
External Bus Interface
Internal Flash
Internal Peripherals
Reserved
Periphera DMA
Controller
X
X
X
X
2
ISI Controller
X
X
3
Ethernet MAC
X
X
X
4
6254CS–ATARM–08-Jan-10
USB Host
Controller
X
X
5

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