SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 3

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
1. AT91SAM9XE128/256/512 Description
6254CS–ATARM–08-Jan-10
The AT91SAM9XE128/256/512 is based on the integration of an ARM926EJ-S processor with
fast ROM and RAM, 128, 256 or 512 Kbytes of Flash and a wide range of peripherals.
The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via
a parallel interface on a production programmer prior to mounting. Built-in lock bits a security bit
and MMU protect the firmware from accidental overwrite and preserve its confidentiality.
The AT91SAM9XE128/256/512 embeds an Ethernet MAC, one USB Device Port, and a USB
Host Controller. It also integrates several standard peripherals, like six UARTs, SPI, TWI, Timer
Counters, Synchronous Serial Controller, ADC and a MultiMedia/SD Card Interface.
The AT91SAM9XE128/256/512 system controller includes a reset controller capable of manag-
ing the power-on sequence of the microcontroller and the complete system. Correct device
operation can be monitored by a built-in brownout detector and a watchdog running off an inte-
grated RC oscillator.
The AT91SAM9XE128/256/512 is architectured on a 6-layer matrix, allowing a maximum inter-
nal bandwidth of six 32-bit buses. It also features an External Bus Interface capable of
interfacing with a wide range of memory devices.
The pinout and ball-out are fully compatible with the AT91SAM9260 with the exception that the
pin BMS is replaced by the pin ERASE.
IEEE
Required Power Supplies:
Available in a 208-pin PQFP Green and a 217-ball LFBGA Green Package
– 1.65V to 1.95V for VDDBU, VDDCORE and VDDPLL
– 1.65V to 3.6V for VDDIOP1 (Peripheral I/Os)
– 3.0V to 3.6V for VDDIOP0 and VDDANA (Analog-to-digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
®
1149.1 JTAG Boundary Scan on All Digital Pins
AT91SAM9XE128/256/512 Preliminary
3

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