SAM3N0B Atmel Corporation, SAM3N0B Datasheet - Page 303
SAM3N0B
Manufacturer Part Number
SAM3N0B
Description
Manufacturer
Atmel Corporation
- Current page: 303 of 752
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20. SAM3N Boot Program
20.1
20.2
20.3
20.4
11011A–ATARM–04-Oct-10
Description
Hardware and Software Constraints
Flow Diagram
Device Initialization
The SAM-BA
into the different memories of the product.
Table 20-1.
The Boot Program implements the algorithm in
Figure 20-1.
The SAM-BA Boot program uses the internal 12 MHz RC oscillator as source clock for PLL. The
MCK runs from PLL divided by 2. The core runs at 48 MHz.
Initialization follows the steps described below:
Peripheral
UART0
UART0
• SAM-BA Boot uses the first 2048 bytes of the SRAM for variables and stacks. The remaining
• UART0 requirements: None
1. Stack setup
2. Setup the Embedded Flash Controller
3. Switch on internal 12 MHz RC oscillator
4. Configure PLL to run at 96 MHz
5. Switch MCK to run on PLL divided by 2
6. Configure UART0
7. Disable Watchdog
8. Wait for a character on UART0
9. Jump to SAM-BA monitor (see
available size can be used for user's code.
®
Boot Program integrates an array of programs permitting download and/or upload
Pins Driven during Boot Program Execution
Boot Program Algorithm Flow Diagram
Device
Setup
Pin
URXD0
UTXD0
Section 20.5 ”SAM-BA
Figure
Run SAM-BA Monitor
Character # received
No
from UART0?
20-1.
Monitor”)
Yes
PIO Line
PA10
PA9
SAM3N
303
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