CS8420-CSZ Cirrus Logic Inc, CS8420-CSZ Datasheet - Page 51

IC SAMPLE RATE CONVERTER 28SOIC

CS8420-CSZ

Manufacturer Part Number
CS8420-CSZ
Description
IC SAMPLE RATE CONVERTER 28SOIC
Manufacturer
Cirrus Logic Inc
Type
Sample Rate Converterr
Datasheets

Specifications of CS8420-CSZ

Package / Case
28-SOIC
Applications
CD-R, DAT, DVD, MD, VTR
Mounting Type
Surface Mount
Operating Supply Voltage
5 V
Operating Temperature Range
- 10 C to + 70 C
Mounting Style
SMD/SMT
Resolution
17 bit to 24 bit
Control Interface
3 Wire, Serial
Supply Voltage Range
4.75V To 5.25V
Audio Ic Case Style
SOIC
No. Of Pins
28
Bandwidth
20kHz
Rohs Compliant
Yes
Audio Control Type
Volume
Dc
0841
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1782 - EVALUATION BOARD FOR CS8420
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1125-5

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CS8420
12. SOFTWARE MODE - PIN DESCRIPTION
The above diagram and the following pin descriptions apply to Software mode. In Hardware mode, some pins
change their function as described in subsequent sections of this data sheet. Fixed function pins are marked with a
*, and will be described once in this section. Pins marked with a + are used upon reset to select various start-up
options, and require a pull-up or pull-down resistor.
Power Supply Connections:
VD+ - Positive Digital Power *
Positive supply for the digital section. Nominally +5.0 V.
VA+ - Positive Analog Power *
Positive supply for the analog section. Nominally +5.0 V. This supply should be as quiet as possible since noise on
this pin will directly affect the jitter performance of the recovered clock.
DGND - Digital Ground *
Ground for the digital section. DGND should be connected to the same ground as AGND.
AGND - Analog Ground *
Ground for the analog section. AGND should be connected to the same ground as DGND.
Clock-Related Pins:
OMCK - Output Section Master Clock Input
Output section master clock input. The frequency must be 256x, 384x, or 512x the output sample rate (Fso).
RMCK - Input Section Recovered Master Clock Output
Input section recovered master clock output. Will be at a frequency of 128x or 256x the input sample rate (Fsi).
DS245F4
51

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