STA308A STMicroelectronics, STA308A Datasheet - Page 26

• Manufacturer Part Number: STA308A
• Description: IC AUDIO PROCESSOR DGTL 64-TQFP
• Manufacturer: STMicroelectronics
• Series: DDX™r
• Type: Audio Processorr

Specifications of STA308A

• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Lead Free Status / Rohs Status: Compliant

Registers
7.2.4
26/63
Configuration register D (0x03)
The DDX power output mode selects how the DDX output timing is configured. Different
power devices use different output modes. The STA50x recommended use is OM = 10.
Setting the MPC bit turns on special processing that corrects the STA50x power device at
high power. This mode should lower the THD+N of a full STA50x DDX system at maximum
power output and slightly below. This mode will only be operational in OM[1,0] = 01.
MPC
1
0
1
OM[1,0]
00
01
10
11
2
3
4
5
6
00000
00001
…
11111
7
Bit
Bit
Bit
D7
CSZ[4:0]
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
CSZ4
1
D6
0
1
0
0
0
0
1
1
RST
RST
RST
Output stage - mode
STA50x/STA51xB - drop compensation
Discrete output stage - tapered compensation
STA50x/STA51xB - full power mode
Variable drop compensation (CSZn bits)
0 clock period compensating pulse size
1 clock period compensating pulse size
…
31 clock period compensating pulse size
CSZ3
0
OM0
OM1
CSZ0
CSZ1
CSZ2
CSZ3
CSZ4
MPC
D5
Name
Name
Name
CSZ2
0
D4
DDX power output mode: selects configuration of
DDX output.
Max power correction: setting of 1 enables STA50x
correction for THD reduction near maximum power
output.
Contra size register: when OM[1,0] = 11, this register
determines the size of the DDX compensating pulse
from 0 clock ticks to 31 clock periods.
Compensating pulse size
CSZ1
0
D3
CSZ0
0
Description
Description
Description
D2
OM1
1
D1
OM0
0
STA308A
D0