TDA7500A STMicroelectronics, TDA7500A Datasheet - Page 28

IC PROCESSOR AM/FM DGTL 100-TQFP

TDA7500A

Manufacturer Part Number
TDA7500A
Description
IC PROCESSOR AM/FM DGTL 100-TQFP
Manufacturer
STMicroelectronics
Type
Audio Processorr
Datasheet

Specifications of TDA7500A

Applications
Audio Systems
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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TDA7500A
I
Figure 16. Definition of Timing for the I
SPDIF TIMING
28/40
2
Symbol
Symbol
C TIMING
SPHYS
t
t
t
t
t
SU;STO
HD:STA
HD:DAT
SPVL
SU:STA
SU:DAT
SPIR
t
F
t
t
HIGH
LOW
BUF
C
SCL
t
t
R
F
b
SCLl clock frequency
Bus free between a STOP and
Start Condition
Hold time (repeated) START
condition. After this period, the
first clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated start
condition
DATA hold time
Rise time of both SDA and SCL
signals
Fall time of both SDA and SCL
signals
Set-up time for STOP condition
Data set-up time
Capacitive load for each bus line
AC input level
Input impedance
Hysteresis of input
Parameter
Parameter
2
Cb in pF
Cb in pF
@ 1 kHz
C BUS.
Test Condition
Test Condition
Standard Mode
Min.
250
4.7
4.0
4.7
4.0
4.7
0
0
4
I
2
C BUS
Max.
1000
Min.
100
300
400
0.2
--
0.1C
0.1C
Min.
Typ.
20+
20+
1.3
0.6
1.3
0.6
0.6
0.6
0.5
40
Fast Mode
--
0
0
6
I
2
C BUS
b
b
Max.
Max.
400
300
300
100
400
0.9
3.3
Unit
Unit
Vpp
kHz
mV
k
pF
ns
ns
ns
s
s
s
s
s
s
s

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