TDA7431 STMicroelectronics, TDA7431 Datasheet - Page 9

• Manufacturer Part Number: TDA7431
• Description: IC PROCESSOR AUDIO DGTL 42-SDIP
• Manufacturer: STMicroelectronics
• Type: Audio Processorr

Specifications of TDA7431

• Applications: Automotive Systems
• Mounting Type: Through Hole
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5. Electrical Characteristcs (continued)
3
Data transmission from microprocessor to the TDA7430/TDA7431 and viceversa takes place through the 2
wires I
must be connected).
3.1 Data Validity
As shown in fig. 8, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
3.2 Start and Stop Conditions
As shown in fig.9 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
3.3 Byte Format
Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
3.4 Acknowledge
The master ( P) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 10).
The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during this clock
pulse.
The audioprocessor which has been addressed has to generate an acknowledge after the reception of each
byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master
transmitter can generate the STOP information in order to abort the transfer.
3.5 Transmission without Acknowledge
Avoiding to detect the acknowledge of the audioprocessor, the P can use a simpler transmission: simply it
waits one clock without checking the slave acknowledging, and sends the new data.
This approach of course is less protected from misworking.
BUS INPUTS
Symbol
R
V
V
V
V
S
V
OCL
OUT
OUT
I
d
IN
IH
IL
I
C
O
2
2
C BUS INTERFACE
C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage
Distorsion
Channel Separation
Clipping Level
Output Resistance
DC Voltage Level
Input Low Voltage
Input High Voltage
Input Current
Output Voltage SDA
Acknowledge
Parameter
A
d = 0.3%
I
O
v
= 1.6mA
= 0 ; V
in
Test Condition
= 1V
rms
Min.
70
10
-5
2
3
TDA7430 - TDA7431
Typ.
0.01
2.5
3.8
90
40
Max.
0.1
0.4
70
+5
1
Vrms
Unit
mA
dB
%
V
V
V
V
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