LPC1224FBD64 NXP Semiconductors, LPC1224FBD64 Datasheet - Page 42

The LPC1224FBD64 is an ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption

LPC1224FBD64

Manufacturer Part Number
LPC1224FBD64
Description
The LPC1224FBD64 is an ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC122X
Product data sheet
10.4 ADC characteristics
Table 9.
T
3.6 V.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Input resistance R
Symbol
E
R
V
C
E
E
E
E
f
c(ADC)
amb
IA
D
L(adj)
O
G
T
ia
i
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
Conditions: V
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
See
The integral non-linearity (E
the ideal transfer curve after appropriate adjustment of gain and offset errors. See
The offset error (E
straight line which fits the ideal curve. See
The gain error (E
curve after removing offset error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
curve of the non-calibrated ADC and the ideal transfer curve. See
T
=
amb
40
Figure
= 25 C; maximum sampling frequency f
ADC static characteristics
C to +85
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
ADC conversion frequency
input resistance
19.
SS
All information provided in this document is subject to legal disclaimers.
= 0 V, V
G
i
O
) is the relative difference in percent between the straight line fitting the actual transfer
depends on the sampling frequency fs: R
) is the absolute difference between the straight line which fits the actual curve and the
C unless otherwise specified; ADC frequency 9 MHz, V
T
) is the maximum difference between the center of the steps of the actual transfer
Rev. 2 — 26 August 2011
DD(3V3)
L(adj)
= 3.3 V.
D
) is the peak difference between the center of the steps of the actual and
) is the difference between the actual step width and the ideal step width.
Conditions
Figure
s
= 257 kHz and analog input capacitance C
19.
32-bit ARM Cortex-M0 microcontroller
[2][3][4]
[9][10]
i
[2][5]
[2][6]
[2][7]
[2][8]
= 1 / (f
Figure
Min
0
-
-
-
-
-
-
-
-
s
 C
ia
19.
).
Typ
-
-
-
-
-
-
-
-
-
[1]
Figure
DD(3V3)
LPC122x
© NXP B.V. 2011. All rights reserved.
Max
V
1
 1
 2.5
 1
 3
 3
257
3.9
DD(3V3)
19.
ia
= 3.0 V to
= 1 pF.
Figure
Unit
V
pF
LSB
LSB
LSB
LSB
LSB
kHz
M
42 of 61
19.

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