PSMN3R7-25YLC NXP Semiconductors, PSMN3R7-25YLC Datasheet - Page 3

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN3R7-25YLC

Manufacturer Part Number
PSMN3R7-25YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
5. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PSMN3R7-25YLC
Product data sheet
Symbol
V
V
V
I
I
P
T
T
T
V
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
Fig 1.
stg
j
sld(M)
DS
DGR
GS
tot
ESD
DS(AL)S
(A)
I
D
120
100
80
60
40
20
0
mounting base temperature
Continuous drain current as a function of
0
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
electrostatic discharge voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
50
100
150
N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower
All information provided in this document is subject to legal disclaimers.
003a a f 855
T
mb
( C)
200
Rev. 01 — 2 May 2011
Conditions
25 °C ≤ T
25 °C ≤ T
V
V
pulsed; t
see
T
MM (JEDEC JESD22-A115)
T
pulsed; t
V
V
see
mb
mb
GS
GS
GS
sup
Figure 4
Figure 3
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 25 V; unclamped; R
p
p
j
j
Fig 2.
≤ 10 µs; T
≤ 10 µs; T
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
P
(%)
der
120
80
40
= 25 °C; see
= 100 °C; see
Figure 2
0
= 25 °C; I
function of mounting base temperature
Normalized total power dissipation as a
0
mb
mb
GS
= 25 °C;
= 25 °C
= 20 kΩ
GS
D
50
= 98 A;
= 50 Ω;
PSMN3R7-25YLC
Figure 1
Figure 1
100
Min
-
-
-20
-
-
-
-
-55
-55
-
310
-
-
-
150
© NXP B.V. 2011. All rights reserved.
T
mb
175
175
260
-
Max
25
25
20
97
68
387
64
58
387
24
03na19
(°C)
200
Unit
V
V
V
A
A
A
W
°C
°C
°C
V
A
A
mJ
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