STM32L151R6 STMicroelectronics, STM32L151R6 Datasheet - Page 22
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STM32L151R6
Manufacturer Part Number
STM32L151R6
Description
Ultra-low-power ARM Cortex-M3 MCU with 32 Kbytes Flash, 32 MHz CPU, LCD, USB
Manufacturer
STMicroelectronics
Datasheet
1.STM32L152VB.pdf
(109 pages)
Specifications of STM32L151R6
Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V (with BOR option)
Temperature Range
–40 to 85 °C
4 Modes
Sleep, Low-power run (9 μA at 32 kHz), Low-power sleep (4.4 μA),Stop with RTC (1.45 μA), Stop (570 nA), Standby (300 nA)
Ultralow Leakage Per I/o
50 nA
Fast Wakeup From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
7-channel DMA controller, supporting timers, ADC, SPIs, I2Cs and USARTs
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Functional overview
3.14.1
3.14.2
3.14.3
3.14.4
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General-purpose timers (TIM2, TIM3, TIM4, TIM9, TIM10 and TIM11)
There are six synchronizable general-purpose timers embedded in the STM32L15xxx
devices (see
TIM2, TIM3, TIM4
These timers are based on a 16-bit auto-reload up/downcounter and a 16-bit prescaler.
They feature 4 independent channels each for input capture/output compare, PWM or one-
pulse mode output. This gives up to 12 input captures/output compares/PWMs on the
largest packages.
The TIM2, TIM3, TIM4 general-purpose timers can work together or with the TIM10, TIM11
and TIM9 general-purpose timers via the Timer Link feature for synchronization or event
chaining. Their counter can be frozen in debug mode. Any of the general-purpose timers
can be used to generate PWM outputs.
TIM2, TIM3, TIM4 all have independent DMA request generation.
These timers are capable of handling quadrature (incremental) encoder signals and the
digital outputs from 1 to 3 hall-effect sensors.
TIM10, TIM11 and TIM9
These timers are based on a 16-bit auto-reload upcounter and a 16-bit prescaler. TIM10 and
TIM11 feature one independent channel, whereas TIM9 has two independent channels for
input capture/output compare, PWM or one-pulse mode output. They can be synchronized
with the TIM2, TIM3, TIM4 full-featured general-purpose timers.
They can also be used as simple time bases and be clocked by the LSE clock source
(32.768 kHz) to provide time bases independent from the main CPU clock.
Basic timers (TIM6 and TIM7)
These timers are mainly used for DAC trigger generation. They can also be used as generic
16-bit time bases.
SysTick timer
This timer is dedicated to the OS, but could also be used as a standard downcounter. It is
based on a 24-bit downcounter with autoreload capability and a programmable clock
source. It features a maskable system interrupt generation when the counter reaches 0.
Independent watchdog (IWDG)
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 37 kHz internal RC and, as it operates independently of the
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog
to reset the device when a problem occurs, or as a free-running timer for application timeout
management. It is hardware- or software-configurable through the option bytes. The counter
can be frozen in debug mode.
Table 3
for differences).
Doc ID 17659 Rev 6
STM32L151xx, STM32L152xx