STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 86
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STM32F205ZG
Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F205VE.pdf
(170 pages)
Specifications of STM32F205ZG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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Electrical characteristics
Table 31.
1. Take care of using the appropriate division factor M to obtain the specified PLL input clock values. The M
2. Guaranteed by design, not tested in production.
3. The use of 2 PLLs in parallel could degraded the Jitter up to +30%.
4. Based on characterization, not tested in production.
Table 32.
86/170
t
Jitter
I
I
f
f
f
t
LOCK
DD(PLL)
DDA(PLL)
PLLI2S_IN
PLLI2S_OUT
VCO_OUT
LOCK
factor is shared between PLL and PLLI2S.
Symbol
Symbol
(3)
(4)
(4)
Main PLL characteristics (continued)
PLLI2S (audio PLL) characteristics
PLL lock time
Cycle-to-cycle jitter
Period Jitter
Main clock output (MCO) for
RMII Ethernet
Main clock output (MCO) for MII
Ethernet
Bit Time CAN jitter
PLL power consumption on VDD
PLL power consumption on
VDDA
PLLI2S input clock
PLLI2S multiplier output clock
PLLI2S VCO output
PLLI2S lock time
Parameter
Parameter
(2)
Doc ID 15818 Rev 8
VCO freq = 192 MHz
VCO freq = 432 MHz
System clock
120 MHz
Cycle to cycle at 50 MHz
on 1000 samples
Cycle to cycle at 25 MHz
on 1000 samples
Cycle to cycle at 1 MHz
on 1000 samples
VCO freq = 192 MHz
VCO freq = 432 MHz
VCO freq = 192 MHz
VCO freq = 432 MHz
VCO freq = 192 MHz
VCO freq = 432 MHz
(1)
Conditions
Conditions
peak
to
peak
peak
to
peak
RMS
RMS
0.15
0.45
0.30
0.55
Min
100
75
-
-
-
-
-
-
-
STM32F205xx, STM32F207xx
0.95
Min
192
100
75
-
(3)
±150
±200
Typ
330
25
15
32
40
-
-
-
-
Typ
1
-
-
-
-
Max
0.40
0.75
0.40
0.85
2.10
200
300
Max
216
432
200
300
-
-
-
-
-
-
-
(3)
Unit
mA
mA
MHz
MHz
MHz
Unit
µs
ps
µs