STM32F101VC STMicroelectronics, STM32F101VC Datasheet - Page 109

• Manufacturer Part Number: STM32F101VC
• Description: Mainstream Access line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 36 MHz CPU
• Manufacturer: STMicroelectronics

Specifications of STM32F101VC

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, DAC, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

STM32F101xC, STM32F101xD, STM32F101xE
Table 66.
30-Mar-2009
Date
Document revision history (continued)
Revision
5
I/O information clarified on cover page. Number of ADC peripherals
corrected in
STM32F101xE features and peripheral
In
– I/O level of pins PF11, PF12, PF13, PF14, PF15, G0, G1 and G15
– PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default
PG14 pin description modified in
Figure 6: Memory map on page 33
Note modified in
code with data processing running from Flash
current consumption in Sleep mode, code running from Flash or
Figure
changed).
Table 21: High-speed external user clock characteristics
Low-speed user external clock characteristics
ACC
FSMC configuration modified for
Notes modified below
SRAM/PSRAM/NOR read waveforms
non-multiplexed SRAM/PSRAM/NOR write
t
SRAM/PSRAM/NOR read timings
multiplexed NOR/PSRAM write
Table 32: Asynchronous non-multiplexed SRAM/PSRAM/NOR write
timings.
In
Table 38: Synchronous non-multiplexed PSRAM write
– t
– t
– t
Figure 25: Synchronous multiplexed NOR/PSRAM read
Figure 26: Synchronous multiplexed PSRAM write timings
Figure 28: Synchronous non-multiplexed PSRAM write timings
modified. Small text changes.
w(NADV)
updated
column to Remap column.
Table 5: High-density STM32F101xx pin
Table 36: Synchronous multiplexed PSRAM write timings
v(Data-CLK)
d(CLKL-Data)
h(CLKL-DV)
Doc ID 14610 Rev 8
HSI
14,
max values modified in
values modified in
Figure 15
Table 2: STM32F101xC, STM32F101xD and
/ t
renamed as t
min value removed and max value added
h(CLKL-ADV)
Table 14: Maximum current consumption in Run mode,
and
Figure 21: Asynchronous non-multiplexed
Figure 16
removed
d(CLKL-Data)
Table 31: Asynchronous non-multiplexed
Changes
timings. t
Table 25: HSI oscillator characteristics
Asynchronous waveforms and
Table 6: FSMC pin
and
modified.
show typical curves (titles
and
Table 34: Asynchronous
counts.
h(Data_NWE)
Figure 22: Asynchronous
definitions:
waveforms.
modified.
and
Table 16: Maximum
definition.
Revision history
modified in
timings:
timings,
and
and
and
Table 22:
timings.
109/112
RAM.