STM32W108CB STMicroelectronics, STM32W108CB Datasheet - Page 85

• Manufacturer Part Number: STM32W108CB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108CB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
9.4.4
9.5
Interrupts
SPI slave controller second level interrupts are generated on the following events:
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To enable CPU interrupts, set desired interrupt bits in the second level INT_SCxCFG
register, and also enable the top level SCx interrupt in the NVIC by writing the INT_SCx bit
in the INT_CFGSET register.
Inter-integrated circuit interfaces (I
Both STM32W108 serial controllers SC1 and SC2 include an Inter-integrated circuit
interface (I
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The I
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Table 46
pins are configured as open-drain outputs, they require external pull-up resistors.
Table 46.
Direction
GPIO configuration
SC1 pin
SC2 pin
Transmit FIFO empty and last character shifted out (depending on SCx_INTMODE,
either the 0 to 1 transition or the high level of SC_SPITXIDLE)
Transmit FIFO changed from full to not full (depending on SCx_INTMODE, either the 0
to 1 transition or the high level of SC_SPITXFREE)
Receive FIFO changed from empty to not empty (depending on SCx_INTMODE, either
the 0 to 1 transition or the high level of SC_SPIRXVAL)
Transmit DMA buffer A/B complete (1 to 0 transition of SC_TXACTA/B)
Receive DMA buffer A/B complete (1 to 0 transition of SC_RXACTA/B)
Received and lost character while receive FIFO was full (receive overrun error)
Transmitted character while transmit FIFO was empty (transmit underrun error)
Uses only two bidirectional GPIO pins
Programmable clock frequency (up to 400 kHz)
Supports both 7-bit and 10-bit addressing
Compatible with Philips' I
SDA (Serial Data) - bidirectional serial data
SCL (Serial Clock) - bidirectional serial clock
2
C master controller uses just two signals:
lists the GPIO pins used by the SC1 and SC2 I
Parameter
2
C) master controller with the following features:
I
2
C Master GPIO Usage
Doc ID 16252 Rev 13
2
C-bus slave devices
Alternate Output
Input / Output
(open drain)
SDA
PB1
PA1
2
C)
2
C master controllers. Because the
Alternate Output
Input / Output
(open drain)
Serial interfaces
SCL
PB2
PA2
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