ST72321BJ6 STMicroelectronics, ST72321BJ6 Datasheet - Page 63

• Manufacturer Part Number: ST72321BJ6
• Description: 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72321BJ6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ON-CHIP PERIPHERALS (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register
is set and an overflow interrupt request is generat-
ed if the overflow interrupt enable bit, OIE, in the
ARTCSR register, is set. The OVF flag must be re-
set by the user software. This interrupt can be
used as a time base in the application.
Figure 41. External Event Detector Example (3 counts)
f
EXT
COUNTER
=f
COUNTER
OVF
FDh
FEh
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
ARTARR=FDh
FFh
INTERRUPT
IF OIE=1
FDh
External clock and event detector mode
Using the f
auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register
is used to select the n
be counted before setting the OVF flag.
Caution: The external clock function is not availa-
ble in HALT mode. If HALT mode is used in the ap-
plication, prior to executing the HALT instruction,
the counter must be disabled by clearing the TCE
bit in the ARTCSR register to avoid spurious coun-
ter increments.
ARTCSR READ
FEh
EXT
n
EVENT
FFh
external prescaler input clock, the
INTERRUPT
IF OIE=1
= 256 - ARTARR
EVENT
FDh
ARTCSR READ
number of events to
t
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