ST72324LK2 STMicroelectronics, ST72324LK2 Datasheet - Page 104

• Manufacturer Part Number: ST72324LK2
• Description: 3V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324LK2

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST72324Lxx
11 INSTRUCTION SET
11.1 CPU ADDRESSING MODES
The CPU features 17 different addressing modes
which can be classified in seven main groups:
The CPU Instruction set is designed to minimize
the number of bytes required per instruction: To do
Table 25. CPU Addressing Mode Overview
104/154
1
Addressing Mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Inherent
Immediate
Short
Long
No Offset
Short
Long
Short
Long
Short
Long
Relative
Relative
Bit
Bit
Bit
Bit
Mode
Direct
Direct
Direct
Direct
Direct
Indirect
Indirect
Indirect
Indirect
Direct
Indirect
Direct
Indirect
Direct
Indirect
Indexed
Indexed
Indexed
Indexed
Indexed
Relative
Relative
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset
byte,#5
nop
ld A,#$55
ld A,$10
ld A,$1000
ld A,(X)
ld A,($10,X)
ld A,($1000,X)
ld A,[$10]
ld A,[$10.w]
ld A,([$10],X)
ld A,([$10.w],X)
jrne loop
jrne [$10]
bset $10,#7
bset [$10],#7
btjt $10,#7,skip
btjt [$10],#7,skip
Syntax
Destination
00..FF
0000..FFFF
00..FF
00..1FE
0000..FFFF
00..FF
0000..FFFF
00..1FE
0000..FFFF
PC+/-127
PC+/-127
00..FF
00..FF
00..FF
00..FF
so, most of the addressing modes may be subdi-
vided in two submodes called long and short:
– Long addressing mode is more powerful be-
– Short addressing mode is less powerful because
The ST7 Assembler optimizes the use of long and
short addressing modes.
cause it can use the full 64 Kbyte address space,
however it uses more bytes and more CPU cy-
cles.
it can generally only access page zero (0000h -
00FFh range), but the instruction size is more
compact, and faster. All memory to memory in-
structions use short addressing modes only
(CLR, CPL, NEG, BSET, BRES, BTJT, BTJF,
INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
Address
Pointer
(Hex.)
Pointer Size
byte
word
byte
word
byte
byte
byte
(Hex.)
+ 0
+ 1
+ 1
+ 2
+ 0
+ 1
+ 2
+ 2
+ 2
+ 2
+ 2
+ 1
+ 2
+ 1
+ 2
+ 2
+ 3
Length
(Bytes)