ST72321BR9 STMicroelectronics, ST72321BR9 Datasheet - Page 47
ST72321BR9
Manufacturer Part Number
ST72321BR9
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST72321BJ6.pdf
(187 pages)
Specifications of ST72321BR9
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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I/O PORTS (Cont’d)
Figure 31. I/O Port General Block Diagram
Table 10. I/O Port Mode Options
Legend: NI - not implemented
Input
Output
REGISTER
ACCESS
INTERRUPT
SOURCE (ei
EXTERNAL
DDR SEL
OR SEL
Off - implemented not activated
On - implemented and activated
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
OR
x
DR
)
ALTERNATE
OUTPUT
ALTERNATE
ENABLE
If implemented
1
0
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
1
0
Pull-Up
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
N-BUFFER
PULL-UP
CONDITION
P-Buffer
Off
On
Off
NI
SS
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
to V
is not implemented in the
On
P-BUFFER
(see table below)
DD
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
SS
47/187
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