STR912FAW44 STMicroelectronics, STR912FAW44 Datasheet - Page 88

• Manufacturer Part Number: STR912FAW44
• Description: ARM966E-S 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
• Manufacturer: STMicroelectronics

Specifications of STR912FAW44

• Arm966e-s Risc Core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)

Electrical characteristics
7.12.5
88/102
SPI electrical characteristics
V
Table 46.
Figure 30. SPI slave timing diagram with CPHA = 0
MISO
MOSI
DDQ
1/t
t
t
Symbol
w(SCLKH)
w(SCLKL)
t
t
t
t
r(SCLK)
f(SCLK)
t
t
t
t
dis(SO)
t
t
f
t
t
su(SS)
t
su(MI)
t
v(MO)
h(MO)
NSS
SCLK
c(SCLK)
su(SI)
a(SO)
v(SO)
h(SO)
h(SS)
h(MI)
h(SI)
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
= 2.7 - 3.6 V, V
INPUT
SPI clock frequency
SPI clock rise and fall times 50pF load
SS setup time
SS hold time
SCLK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
SPI electrical characteristics
t
a(SO)
t
su(NSS)
t
su(SI)
Parameter
DD
= 1.65 - 2 V, T
t
t
MSB IN
w(SCLKH)
w(SCLKL)
MSB OUT
Doc ID 13495 Rev 6
t
t
h(SI)
c(SCLK)
A
t
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Slave
Slave (after enable
edge)
Master (before capture
edge)
v(SO)
= -40 / 85 °C unless otherwise specified.
Test conditions
BIT6 OUT
BIT1 IN
t
h(SO)
t
t
r(SCLK)
f(SCLK)
TBD
TBD
0.25
0.25
Typ
1
1
1
5
6
0
LSB IN
Value
0.1
LSB OUT
t
h(NSS)
Max
24
STR91xFAxxx
6
4
6
6
t
V/ns
dis(SO)
t
MHz
Unit
PCLK