ST72561AR7 STMicroelectronics, ST72561AR7 Datasheet - Page 92

• Manufacturer Part Number: ST72561AR7
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72561AR7

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

ST72561
10.5 8-BIT TIMER (TIM8)
10.5.1 Introduction
The timer consists of a 8-bit free-running counter
driven by a programmable prescaler.
It may be used for a variety of purposes, including
pulse length measurement of up to two input sig-
nals (input capture) or generation of up to two out-
put waveforms (output compare and PWM).
Pulse lengths and waveform periods can be mod-
ulated from a few microseconds to several milli-
seconds using the timer prescaler and the clock
prescaler.
10.5.2 Main Features
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The Block Diagram is shown in
*Note: Some timer pins may not be available (not
bonded) in some ST7 devices. Refer to the device
pin out description.
92/265
– 2 dedicated 8-bit registers
– 2 dedicated programmable signals
– 2 dedicated status flags
– 1 dedicated maskable interrupt
– 2 dedicated 8-bit registers
– 2 dedicated active edge selection signals
– 2 dedicated status flags
– 1 dedicated maskable interrupt
Programmable prescaler: f
or f
Overflow status flag and maskable interrupt
Output compare functions with
Input capture functions with
Pulse width modulation mode (PWM)
One pulse mode
Reduced Power Mode
4 alternate functions on I/O ports (ICAP1, ICAP2,
OCMP1, OCMP2)*
OSC2
divided by 8000.
CPU
Figure
divided by 2, 4 , 8
59.
When reading an input signal on a non-bonded
pin, the value will always be ‘1’.
10.5.3 Functional Description
10.5.3.1 Counter
The main block of the Programmable Timer is a 8-
bit free running upcounter and its associated 8-bit
registers.
These two read-only 8-bit registers contain the
same value but with the difference that reading the
ACTR register does not clear the TOF bit (Timer
overflow flag), located in the Status register, (SR).
Writing in the CTR register or ACTR register re-
sets the free running counter to the FCh value.
Both counters have a reset value of FCh (this is
the only value which is reloaded in the 8-bit timer).
The reset value of both counters is also FCh in
One Pulse mode and PWM mode.
The timer clock depends on the clock control bits
of the CR2 register, as shown in
Control
peats every 512, 1024, 2048 or 20480000 f
clock cycles depending on the CC[1:0] bits.
The timer frequency can be f
or f
For example, if f
f
Refer to
OSC2
OSC2
= 8 MHz, the timer frequency will be 1 ms.
Bits. The value in the counter register re-
Table 19 on page
/8000.
OSC2
/8000 is selected, and
105.
CPU
/2, f
Table 19 Clock
CPU
/4, f
CPU
CPU
/8