ST7LNB0V2Y0 STMicroelectronics, ST7LNB0V2Y0 Datasheet
ST7LNB0V2Y0
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ST7LNB0V2Y0 Summary of contents
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... Operating voltage Temperature range September 2007 DiSEqC™ 2.1 slave microcontroller Description The ST7LNB0V2Y0 is an 8-bit microcontroller dedicated to DiSEqC™ slave operation in LNBs and switchers compliant with the DiSEqC™ level 2.1. It also supports backwards compatible mode (13/ kHz tone) and toneburst signalling ...
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... Contents Contents 1 ST7LNB0V2Y0 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 ST7LNB0V2Y0 implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 ST7LNB0V2Y0 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 ST7LNB0V2Y0 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 ST7LNB0V2Y0 switching output modes . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2.1 3.2.2 3.2.3 4 Supported DiSEqC™ commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 ST7LNB0V2Y0 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 Command 0Fh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.2 Command 0Dh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.4 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 ...
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... ST7LNB0V2Y0 6.7 Control pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7.3 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Device configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8.1 Data EEPROM option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Contents 3/30 ...
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... Single polarity output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 4. ST7LNB0V2Y0 DiSEqC™ supported commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Command 0Fh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 6. Command 0Dh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 7. Reply to command 0Dh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 8. ST7LNB0V2Y0 EEPROM parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 9. Output configuration byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 10. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 11. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 12. Thermal characteristics Table 13. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 14 ...
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... ST7LNB0V2Y0 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. SO16 narrow pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. ST7LNB0V2Y0 typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 5. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 6. Typical IDD in Run vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7. Two typical applications with unused I/O pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 8. Typical IPU vs. VDD with VIN=VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 9 ...
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... ST7LNB0V2Y0 pin description 1 ST7LNB0V2Y0 pin description Figure 2. SO16 narrow pinout not connected See Table 2 for a description of the pin functions. Table 2. ST7LNB0V2Y0 pin functions Pin Function number name RESET 4 DRX 5 OP5 6 OP6 7 OP7 8 OP8 9 OP4 10 OP3 11 OP2 12 OP1 13 SBY ...
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... The divider chain connected to the DRX pin must have the following resistance values: 330KΩ and 100KΩ. 2. The reset circuitry linked to the RESET pin is optional. In fact the ST7LNB0V2Y0 has an internal voltage level detector (LVD) which generates a static reset when the V 4 The DiSEqC signalling must have a tone frequency of 2 2kHz (± ...
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... Hi/Lo switching) Standby pin use 3.2 ST7LNB0V2Y0 switching output modes The ST7LNB0V2Y0 has 8 pins, OP1 available to provide ‘TTL’ logic levels to operate switches. The switches can be are used to select various signal conditions and sources (for example horizontal polarization, or satellite position). As listed in Table uncommitted output port is composed of OP5 to OP8 ...
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... B/A for controlling switcher for example. 3.2.3 Complementary output mode In this mode the state of the uncommitted switching output port pins is the complementary of the state of the committed output ports pins. For more details refer to page 14 of DiSEqC™ slave microcontroller specifications. ST7LNB0V2Y0 functional description 9/30 ...
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... Supported DiSEqC™ commands 4 Supported DiSEqC™ commands Table 4. ST7LNB0V2Y0 DiSEqC™ supported commands Command number (Hex byte) 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 10h 11h 14h 15h 20h 21h 22h 23h 24h 25h 26h 27h 28h ...
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... Command number (Hex byte) 51h 52h 53h Note: After a power-on, the ST7LNB0V2Y0 responds to backwards compatible signalling (13/ kHz, tone burst) until a valid DiSEqC frame is detected. A RESET command must be sent in order to return to backwards compatible mode. Command name LO Read current L.O frequency table entry number LO Lo Read Lo L ...
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... This configuration is stored in the ST7LNB0V2Y0 embedded EEPROM location. 5.1 Command 0Fh ST7LNB0V2Y0 devices are shipped to customers with a default parameter value. These parameters can be updated using a dedicated 0Fh DiSEqC command. The format of this command is described in be programmed at the “index” location as shown in Table 5 ...
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... ST7LNB0V2Y0 Timings The time required to update a byte parameter (write followed by read operation) is 130 ms; whereas the time required to update all the parameters is about 3 Table 8. ST7LNB0V2Y0 EEPROM parameters index Parameter 00 slave address 01 L.O frequencies 02 Output configuration 03 Serial / version number 04 1. Besides the address defined in the EEPROM at index 00h, addresses 10h and 00h are recognized also as valid addresses ...
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... Unless otherwise specified, all typical curves are given only as design guidelines and are not tested. 6.1.4 Loading capacitor The loading conditions used for pin parameter measurement are shown in Figure 4. Pin loading conditions 14/ =25 °C and T A =25 ° ST7 PIN C L ST7LNB0V2Y0 =T max (given by the for the DD Figure 4. ...
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... ST7LNB0V2Y0 6.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 5. Pin input voltage 6.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied ...
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... Total injected current (sum of all I/O and control pins) ) lines must always be connected to the external supply. SS absolute maximum rating must be respected, otherwise maximum current injection on four I/O port pins of the device. INJ(PIN) Ratings Storage temperature range Maximum junction temperature (see ST7LNB0V2Y0 Maximum value (1) 100 (1) 100 ± 5 ± 5 (4) ± ...
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... ST7LNB0V2Y0 6.3 Operating conditions Table 13. General operating conditions Symbol V Supply voltage DD T Ambient temperature A Table 14. Operating conditions with low voltage detector (LVD) Symbol Reset release threshold V IT+ (LVD) (V rise) DD Reset generation threshold V IT- (LVD) (V fall) DD LVD voltage threshold V hys hysteresis Vt V rise time rate ...
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... A 2. CPU running with memory access, all I/O pins in input mode with a static value at V peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled. 3. Data based on typical ST7LNB0V2Y0 LNB or switcher application software running. Figure 6. Typical I 6.5 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization ...
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... ST7LNB0V2Y0 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application ...
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... Class strictly covers all the JEDEC criteria (international standard). 6.6 I/O port characteristics 6.6.1 General characteristics Subject to general operating conditions for V 20/30 Ratings Conditions =+25 ° Parameter Conditions =5 OSC ST7LNB0V2Y0 Maximum (1) value 4000 Class =+25 ° MHz, OSC A =+25 ° and T unless otherwise specified. A Unit ...
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... Electrical characteristics Min Typ 0.3V 0.7V DD 400 ≤ 120 Figure 7). Data based on design current PU 10 kΩ UNUSED I/O PORT ST7LNB0V2Y0 Max Unit ±1 µA 200 250 kΩ 21/30 ...
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... (standard 0.80 0.70 0.60 0.50 0.40 0.30 0.20 0.10 0.00 0. lio (mA (high-sink 2.50 2.00 1.50 1.00 0.50 0. lio (mA) ST7LNB0V2Y0 , and T unless otherwise specified. CPU A Conditions Min Max =+ Section Table 11. . VSS Section Table 11. ...
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... ST7LNB0V2Y0 Figure 11. Typical 2.00 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 -0. lio (mA) Electrical characteristics -45°C 0°C 25°C 90°C 130°C -5 23/30 ...
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... (6)( Internal reset sources (7) (8) 24. Otherwise the reset will not be taken into account internally. 16. . VSS can be ignored. h(RSTL)in ST7LNB0V2Y0 Min Typ 0.3V 0. =+5 mA 0.5 =+ 200 Section Table 11. and the sum of I Max Unit ...
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... ST7LNB0V2Y0 7 Package characteristics 7.1 Package mechanical data Figure 12. Pin plastic small outline package, 150-mil width, package outline Table 24. Pin plastic small outline package, 150-mil width, mechanical data Dim. Min A 1.35 A1 0.10 B 0.33 C 0.19 D 9. 5.80 α Typ Max 1 ...
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... INT ports used in the application. 7.3 Soldering information In order to meet environmental requirements, ST offers the ST7LNB0V2Y0 in ECOPACK package. The package have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. ...
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... ST7LNB0V2Y0 8 Device configuration 8.1 Data EEPROM option bytes Table 27. Description of data EEPROM option bytes Byte name FAM LOFREQ PARAM FAM option byte: Device Family Address 11h: Normal LNB 15h: Normal Switcher LOFREQ option byte Local Oscillator Frequency Table Entry Number This byte indicates the value of a LNB local oscillator: ...
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... Device configuration Figure 13. Option list 28/30 ST7LNB0V2Y0 ...
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... ST7LNB0V2Y0 typical application circuit on page 7 Added default values in Table 8: ST7LNB0V2Y0 EEPROM parameters 4.0 Changed package name to SO16 NARROW 5.0 Product code changed to ST7LNB0V2Y0 to reflect upgrade in firmware. Document reformatted. Root part number ST7LNB0 changed to ST7LNB0V2Y0. Capacitor changed from 2 180 pF in typical application circuit. ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 30/30 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com ST7LNB0V2Y0 ...