ST6225C STMicroelectronics, ST6225C Datasheet - Page 46

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ST6225C

Manufacturer Part Number
ST6225C
Description
8 Bit ST6 Microcontroller with 16x8-bitADC 1x8-bit TIMER
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST6225C

Clock Sources
crystal/ceramic resonator or RC network, external clock, backup oscillator (LFAO)
2 Power Saving Modes
Wait and Stop

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ST6215C ST6225C
WATCHDOG TIMER (Cont’d)
9.1.7 Register Description
WATCHDOG REGISTER (WDGR)
Address: 0D8h - Read/Write
Reset Value: 1111 1110 (FEh)
Bits 7:2 = T[5:0] Downcounter bits
Caution: These bits are reversed and shifted with
respect to the physical counter: bit-7 (T0) is the
LSB of the Watchdog downcounter and bit-2 (T5)
is the MSB.
Bit 1 = SR: Software Reset bit
Software can generate a reset by clearing this bit
while the C bit is set. When C = 0 (Watchdog de-
activated) the SR bit is the MSB of the 7-bit timer.
0: Generate (write)
1: No software reset generated, MSB of 7-bit timer
46/105
1
T0
7
T1
T2
T3
T4
T5
SR
C
0
Bit 0 = C Watchdog Control bit.
If the hardware option is selected (WDACT bit in
Option byte), this bit is forced high and cannot be
changed by the user (the Watchdog is always ac-
tive). When the software option is selected
(WDACT bit in Option byte), the Watchdog func-
tion is activated by setting the C bit, and cannot
then be deactivated (except by resetting the
MCU).
When C is kept cleared the counter can be used
as a 7-bit timer.
0: Watchdog deactivated
1: Watchdog activated

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