ST7263BE2 STMicroelectronics, ST7263BE2 Datasheet - Page 86

• Manufacturer Part Number: ST7263BE2
• Description: LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
• Manufacturer: STMicroelectronics

Specifications of ST7263BE2

• 4, 8, 16 Or 32 Kbytes Program Memory: high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection

On-chip peripherals
Note:
Caution:
86/186
Baud rate generation
The baud rate for the receiver and transmitter (Rx and Tx) are set independently and
calculated as follows:
with:
PR = 1, 3, 4 or 13 (see SCP[1:0] bits)
TR = 1, 2, 4, 8, 16, 32, 64,128
(see SCT[2:0] bits)
RR = 1, 2, 4, 8, 16, 32, 64,128
(see SCR[2:0] bits)
All these bits are in the SCIBRR register.
Example: If f
receive baud rates are 38400 baud.
The baud rate registers MUST NOT be changed while the transmitter or the receiver is
enabled.
Receiver muting and Wakeup feature
In multiprocessor configurations it is often desirable that only the intended message
recipient should actively receive the full message contents, thus reducing redundant SCI
service overhead for all non addressed receivers.
The non addressed devices may be placed in sleep mode by means of the muting function.
Setting the RWU bit by software puts the SCI in sleep mode:
All the reception status bits can not be set.
All the receive interrupts are inhibited.
A muted receiver may be awakened by one of the following two ways:
●
●
Receiver wakes-up by Idle Line detection when the Receive line has recognized an Idle
Frame. Then the RWU bit is reset by hardware but the IDLE bit is not set.
Receiver wakes-up by Address Mark detection when it received a “1” as the most significant
bit of a word, thus indicating that the message is an address. The reception of this particular
word wakes up the receiver, resets the RWU bit and sets the RDRF bit, which allows the
receiver to receive this word normally and to use it as an address word.
In Mute mode, do not write to the SCICR2 register. If the SCI is in Mute mode during the
read operation (RWU=1) and a address mark wake up event occurs (RWU is reset) before
the write operation, the RWU bit will be set again by this write operation. Consequently the
address byte is lost and the SCI is not woken up from Mute mode.
By Idle Line detection if the WAKE bit is reset,
By Address Mark detection if the WAKE bit is set.
CPU
is 8 MHz (normal mode) and if PR=13 and TR=RR=1, the transmit and
Tx =
Doc ID 7516 Rev 8
(16
f
CPU
*
PR)
*
TR
Rx =
(16
f
CPU
*
PR)
*
RR
ST7263Bxx