ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 81
ST72321J7-Auto
Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet
1.ST72321R9-AUTO.pdf
(243 pages)
Specifications of ST72321J7-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
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ST72321xx-Auto
10.9
10.9.1
Register description
Control register (WDGCR)
Table 36.
Table 37.
WDGCR
Bit
6:0
7
WDGA
Address
RW
002Ah
(Hex.)
7
WDGA
Name
T[6:0]
WDGCR register description
Watchdog timer register map and reset values
Activation bit
7-bit counter (MSB to LSB)
WDGCR
Reset Value
This bit is set by software and only cleared by hardware after a reset. When
WDGA = 1, the watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
Note: This bit is not used if the hardware watchdog option is enabled by option byte.
These bits contain the value of the watchdog counter. It is decremented every 16384
f
becomes cleared).
OSC2
6
Register
label
cycles (approx.). A reset is produced when it rolls over from 40h to 3Fh (T6
5
WDGA
Doc ID 13829 Rev 1
7
0
4
T6
6
1
T5
Function
5
1
T[6:0]
RW
3
T4
4
1
2
T3
3
1
Reset value: 0111 1111 (7Fh)
Watchdog timer (WDG)
T2
2
1
1
T1
1
1
0
81/243
T0
0
1
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