71M6541D Maxim, 71M6541D Datasheet - Page 112
71M6541D
Manufacturer Part Number
71M6541D
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6541D.pdf
(166 pages)
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71M6541D/F/G and 71M6542F/G Data Sheet
112
Name
CHOPR[1:0]
DIFFA_E
DIFFB_E
DIO_R2[2:0]
DIO_R3[2:0]
DIO_R4[2:0]
DIO_R5[2:0]
DIO_R6[2:0]
DIO_R7[2:0]
DIO_R8[2:0]
DIO_R9[2:0]
DIO_R10[2:0]
DIO_R11[2:0]
DIO_RPB[2:0]
DIO_DIR[15:12]
DIO_DIR[11:8]
DIO_DIR[7:4]
DIO_DIR[3:0]
DIO[15:12]
DIO[11:8]
DIO[7:4]
DIO[3:0]
DIO_EEX[1:0]
SFR A0[3:0] SFR 90[3:0]
SFR B0[7:4]
SFR A0[7:4]
SFR B0[3:0]
SFR 90[7:4]
SFR 80[7:4]
SFR 80[3:0]
Location
2709[7:6]
2455[2:0]
2455[6:4]
2454[2:0]
2454[6:4]
2453[2:0]
2453[6:4]
2452[2:0]
2452[6:4]
2451[2:0]
2451[6:4]
2450[2:0]
2456[7:6]
210C[4]
210C[5]
Rst Wk Dir
00 00 R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
0
0
0
–
F
F
–
R/W Enables differential configuration for the IA current input (IAP-IAN).
R/W Enables differential configuration for the IB current input (IBP-IBN).
R/W
R/W
R/W
R/W
Description
The CHOP settings for the remote sensor.
00 = Auto chop. Change every MUX frame.
01 = Positive
10 = Negative
11 = Auto chop. Same as 00.
Connects PB and dedicated I/O pins DIO2 through DIO11 to internal resources.
If more than one input is connected to the same resource, the MULTIPLE
column below specifies how they are combined.
Programs the direction of the first 16 DIO pins. 1 indicates output. Ignored if
the pin is not configured as I/O. See DIO_PV and DIO_PW for special option
for the SEGDIO0 and SEGDIO1 outputs. See DIO_EEX for special option for
SEGDIO2 and SEGDIO3. Note that the direction of DIO pins above 15 is set by
SEGDIOx[1]. See PORT_E to avoid power-up spikes.
The value on the first 16 DIO pins. Pins configured as LCD reads zero.
When written, changes data on pins configured as outputs. Pins configured
as LCD or input ignore writes. Note that the data for DIO pins above 15 is
set by SEGDIOx[0].
When set, converts pins SEGDIO3/SEGDIO2 to interface with external
EEPROM. SEGDIO2 becomes SDCK and SEGDIO3 becomes bi-directional
SDATA, but only if LCD_MAP[2] and LCD_MAP[3] are cleared.
DIO_Rx
DIO_EEX[1:0]
0
1
2
3
4
5
00
01
10
11
Resource
NONE
Reserved
T0 (Timer0 clock or gate)
T1 (Timer1 clock or gate)
IO interrupt (int0)
IO interrupt (int1)
Function
Disable EEPROM interface
2-Wire EEPROM interface
3-Wire EEPROM interface
3-Wire EEPROM interface with separate DO (DIO3)
and DI (DIO8) pins.
MULTIPLE
OR
OR
OR
OR
OR
–
Rev 2
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