71M6541D Maxim, 71M6541D Datasheet - Page 15
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71M6541D
Manufacturer Part Number
71M6541D
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6541D.pdf
(166 pages)
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input pins to the input of the ADC (see
The performance of the IAP-IAN pins can be enhanced by enabling a pre-amplifier with a fixed gain of 8,
using the I/O RAM control bit PRE_E (I/O RAM 0x2704[5]). When PRE_E = 1, IAP-IAN become the inputs
to the 8x pre-amplifier, and the output of this amplifier is supplied to the multiplexer. The 8x amplification
is useful when current sensors with low sensitivity, such as shunt resistors, are used. With PRE_E set, the
IAP-IAN input signal amplitude is restricted to 31.25 mV peak.
For the 71M654x application utilizing two shunt resistor sensors
for differential mode to interface to a local shunt by setting the DIFFA_E control bit. Meanwhile, the IBP-IBN
pins are re-configured as digital balanced pair to communicate with a Teridian 71M6x01 Isolated Sensor
interface by setting the RMT_E control bit (I/O RAM 0x2709[3]). The 71M6x01 communicates with the
71M654x using a bi-directional digital data stream through an isolating low-cost pulse transformer. The
71M654x also supplies power to the 71M6x01 through the isolating transformer. This type of interface is
further described at the end of this chapter (see
Interface)).
For use with Current Transformers (CTs), as shown in
IBP-IBN pins are configured as local analog inputs. The IAP-IAN pins cannot be configured as a remote
sensor interface.
2.2.2 Input Multiplexer
When operating with local sensors, the input multiplexer sequentially applies the input signals from the analog
multiplexer frame. The multiplexer of the 71M6541D/F/G can select up to three input signals (IAP-IAN, VA,
and IBP-IBN) per multiplexer frame as controlled by the I/O RAM control field MUX_DIV[3:0] (I/O RAM
0x2100[7:4]) (see
of four inputs (see
states as determined by MUX_DIV[3:0] have been converted.
The 71M6541D/F/G and 71M6542F/G each require a unique CE code that is written for the specific
application. Moreover, each CE code requires specific AFE and MUX settings in order to function
properly.
shown in
local/remote sensor configuration utilizing the 71M6x01 as shown in
Rev 2
Notes:
Teridian updates the CE code periodically. Please contact your local Teridian representative to obtain the latest CE
code and the associated settings. The configuration presented in this table is set by the MPU demonstration code
during initialization.
Current Sensor Types
Applicable Figure
MUX0_SEL[3:0]
MUX1_SEL[3:0]
MUX2_SEL[3:0]
MUX3_SEL[3:0]
Table 1
Figure 2
MUX_DIV[3:0]
FIR_LEN[1:0]
Mnemonic
PLL_FAST
Equations
ADC_DIV
EQU[2:0]
DIFFA_E
DIFFB_E
CE Code
I/O RAM
RMT_E
provides the CE code and settings corresponding to the local sensor configurations
Figure
and
Figure
Table 1. Required CE Code and Settings for Local Sensors
Figure
6). The multiplexer of the 71M6542F/G adds the VB signal to achieve a total
7). The multiplexer always starts at state 1 and proceeds until as many
4.
210C[2:1]
Location
2100[7:4]
2105[3:0]
2105[7:4]
2104[3:0]
2104[7:4]
2106[7:5]
I/O RAM
Table 2
210C[4]
210C[5]
2200[5]
2200[4]
2709[3]
--
--
--
--
Figure 2
provides the CE code and settings corresponding to the
and
1 Shunt and 1 CT
71M6541D/F/G
2.2.8 71M6x01 Isolated Sensor Interface (Remote Sensor
CE41A01
Figure 2
Figure
0 or 1
0 or 1
(hex)
2 CTs
or
A
1
1
1
3
0
2
1
0
1
1
Figure
4). One complete sampling sequence is called a
71M6541D/F/G and 71M6542F/G Data Sheet
2, the RMT_E control bit is reset, so that the
(Figure
1 Shunt and 1 CT
Figure 3
Eq. 0 or 1
CE41A01
Figure 4
0 or 1
0 or 1
3), the IAP-IAN pins are configured
2 CTs
or
A
1
1
1
3
0
2
1
0
1
1
71M6542F/G
and
(hex)
Figure
1 Shunt and 1 CT
CE41A04
Figure 4
5.
Eq. 2
2 CTs
or
A
2
0
1
4
0
2
9
0
1
1
2
2
15
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