71M6543F Maxim, 71M6543F Datasheet - Page 57

• Manufacturer Part Number: 71M6543F
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

In BRN mode, TEMP_PWR = TEMP_BSEL use:
load is never applied in BRN, LCD, and SLP modes.
The 71M6xx3 includes an on-chip temperature sensor for determining the temperature of its bandgap
reference. The primary use of the temperature data is to determine the magnitude of compensation
required to offset the thermal drift in the system for the compensation of the current measurement
performed by the71M6xx3. See the 71M6xxx Data Sheet for the equation to calculate temperature from the
71M6xx3 STEMP[10:0] reading. Also, see
See
STEMP[10:0] information from the 71M6xx3.
2.5.7 71M6543 Battery Monitor
The 71M6543 temperature measurement circuit can also monitor the batteries at the VBAT and
VBAT_RTC pins. The battery to be tested (i.e., VBAT or VBAT_RTC pin) is selected by TEMP_BSEL (I/O
RAM 0x28A0[7]).
When TEMP_BAT (I/O RAM 0x28A0[4]) is set, a battery measurement is performed as part of each
temperature measurement. The value of the battery reading is stored in register BSENSE[7:0] (I/O RAM
0x2885). The following equations are used to calculate the voltage measured on the VBAT pin (or
VBAT_RTC pin) from the BSENSE[7:0] and STEMP[10:0] values. The result of the equation below is in volts.
A slightly different equation is used for MSN mode and BRN mode, as follows.
In MSN mode, TEMP_PWR = 1 use:
In MSN mode, a 100 µA de-passivation load can be applied to the selected battery (i.e., selected by the
TEMP_BSEL bit) by setting the BCURR (I/O RAM 0x2704[3]) bit. Battery impedance can be measured by
taking a battery measurement with and without BCURR. Regardless of the BCURR bit setting, the battery
2.5.8 71M6xx3 VCC Monitor
The 71M6xx3 monitors its VCC pin voltage. The voltage of the VCC pin can be obtained by the 71M6543
by issuing a read command to the 71M6xx3. The 71M6543 must request both the VSENSE[7:0] and
STEMP[10:0] values from the 71M6xx3. See the 71M6xxx Data Sheet for the equation to calculate the
71M6xx3 VCC pin voltage from the VSENSE[7:0] and STEMP[10:0] values read from the 71M6xx3.
See
VSENSE[7:0] and STEMP[10:0] from the 71M6xx3 remote sensors.
2.5.9 UART and Optical Interface
The 71M6543 provides two asynchronous interfaces, UART0 and UART1. Both can be used to connect
to AMR modules, user interfaces, etc., and also support a mechanism for programming the on-chip flash
memory.
Referring to
designed to directly drive an external LED for transmitting data on an optical link. The pin OPT_RX has
the same threshold as the RX pin, but can also be used to sense the input from an external photo detector
used as the receiver for the optical link. OPT_TX and OPT_RX are connected to a dedicated UART port
(UART1).
The OPT_TX and OPT_RX pins can be inverted with configuration bits OPT_TXINV (I/O RAM 0x2456[0])
and OPT_RXINV (I/O RAM 0x2457[1]), respectively. Additionally, the OPT_TX output may be modulated at
38 kHz. Modulation is available in MSN and BRN modes (see
0x2456[1]) enables modulation. The duty cycle is controlled by OPT_FDC[1:0] (I/O RAM 0x2457[5:4]) ,
which can select 50%, 25%, 12.5%, and 6.25% duty cycle. A 6.25% duty cycle means that OPT_TX is
low for 6.25% of the period.
When not needed for UART1, OPT_TX can alternatively be configured as SEGDIO51. Configuration is
via the OPT_TXE[1:0] (I/O RAM 0x2456[3:2]) field and LCD_MAP[51] (I/O RAM 0x2405[0]). The
v1.2
2.2.8.3 Control of the 71M6xx3 Isolated Sensor
2.2.8.3 Control of the 71M6xx3 Isolated Sensor
Figure
VBAT
VBAT
14, UART1 includes an interface to implement an IR/optical port. The pin OPT_TX is
(
orVBAT
(
orVBAT
© 2008–2011 Teridian Semiconductor Corporation
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RTC
RTC
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3 .
4.5 Metrology Temperature Compensation
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BSENSE
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BSENSE
on page
on page
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142
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71M6543F/H and 71M6543G/GH Data Sheet
22
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22
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Table
0246
for information on how to read
for information on how to read the
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STEMP
STEMP
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000297
000328
on page 89.
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