STHDLS101QTR STMicroelectronics, STHDLS101QTR Datasheet
STHDLS101QTR
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STHDLS101QTR Summary of contents
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... Notebooks ■ PC motherboards and graphic cards ■ Dongles/cable adapters Table 1. Device summary Order code STHDLS101QTR December 2008 AC coupled HDMI level shifter QFN- mm) Description The STHDLS101 is a high-speed high-definition multimedia interface (HDMI) level shifter that converts low-swing AC coupled differential input to HDMI 1.3 compliant open-drain current steering RX-terminated differential output ...
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Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STHDLS101 1 Block diagram Figure 1. STHDLS101 block diagram Block diagram 3/25 ...
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System interface 2 System interface Figure 2. System inferface Graphics chipset (GMCH) on the motherboard Figure 3. Cable adapter 4/25 PCI-Express SDVO HDMI Level shifter STHDLS101 STHDLS101 HDMI output connector CS00374 ...
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STHDLS101 Figure HDMI/DVI cable adapter HDMI/DVI Transmitter PC chipset HPD HPD_SOURCE STHDLS101 AC_TMDS AC_TMDS HDMI/DVI Cable Adaptor DDC DDC System interface HPD_SINK DC TMDS DDC 5/25 ...
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Pin configuration 3 Pin configuration Figure 5. STHDLS101 pin configuration IN_D1+ VCC33 6/25 GND 37 IN_D1 IN_D2- 41 QFN-48 IN_D2+ 42 GND 43 IN_D3- 44 IN_D3+ 45 VCC33 46 IN_D4- 47 IN_D4+ 48 STHDLS101 GND 24 OUT_D1- ...
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STHDLS101 3.1 Pin description Table 2. Pin description Pin Name number 1 GND 2 VCC33 3 FUNCTION1 4 FUNCTION2 5 GND 6 REXT 7 HPD_SOURCE 8 SDA_SOURCE 9 SCL_SOURCE 10 ANALOG2 11 VCC33 12 GND 13 OUT_D4+ Type Power Ground ...
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Pin configuration Table 2. Pin description (continued) Pin Name number 14 OUT_D4- 15 VCC33 16 OUT_D3+ 17 OUT_D3- 18 GND 19 OUT_D2+ 20 OUT_D2- 21 VCC33 22 OUT_D1+ 23 OUT_D1- 24 GND 25 OE_N 26 VCC33 27 GND 28 SCL_SINK ...
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STHDLS101 Table 2. Pin description (continued) Pin Name number 30 HPD_SINK 31 GND 32 DDC_EN 33 VCC33 34 FUNCTION3 35 FUNCTION4 36 GND 37 GND 38 IN_D1- 39 IN_D1+ 40 VCC33 41 IN_D2- 42 IN_D2+ 43 GND 44 IN_D3- 45 ...
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Pin configuration Table 2. Pin description (continued) Pin Name number 46 VCC33 47 IN_D4- 48 IN_D4+ 10/25 Type Power 3.3 V±10% DC supply Low-swing differential input from GMCH PCIE outputs. Input IN_D4- makes a differential pair with IN_D4+. Low-swing differential ...
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STHDLS101 4 Functional description This section describes the basic functionality of the STHDLS101 device. Power supply The STHDLS101 is powered by a single DC power supply of 3.3 V ± 10%. Clocking This device does not retime any data. The ...
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Functional description Table 4. OE_N function OE_N De-asserted (high level) Asserted (low level) or unconnected 12/25 OUT_Dx IN_Dx (TMDS outputs) High-Z High-Z 50 Ω termination Enabled STHDLS101 Notes Device disabled. Low power state. Internal bias currents are disabled. Level shifting ...
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STHDLS101 5 Maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions ...
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Maximum ratings 5.1 Recommended operating conditions 5.1.1 Power supply and temperature range Table 7. Power supply and temperature range Symbol Parameter V 3.3 V power supply CC33 I Maximum power supply current CC T Operating temperature range 5.1.2 Differential inputs ...
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STHDLS101 5.2 TMDS outputs (OUT_D signals) The level shifter’s TMDS outputs are required to meet the HDMI 1.3 specifications. The HDMI 1.3 specification is assumed to be the correct reference in instances where this document conflicts with the HDMI 1.3 ...
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Maximum ratings 5.3 HPD input and output characteristics Table 10. HPD_SINK input and HPS_SOURCE output Symbol Parameter V HPD_SINK input high level IH-HPD_SINK V HPD_SINK input low level IL-HPD_SINK HPD_SINK input leakage I IN-HPD_SINK current V HPD_SOURCE output high OH- ...
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STHDLS101 5.4 DDC input and output chatacteristics Table 11. SDA_SOURCE, SCL_SOURCE and SDA_SINK, SCL_SINK characteristics Symb Parameter ol V Input voltage on SDA_SINK, SCL_SINK pins I Input leakage current on SDA_SINK, SCL_SINK I LKG pins Power-down leakage current on SDA_SINK, ...
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Maximum ratings 5.5 OE_ input characteristics Table 12. OE_N input characteristics Symbol Parameter V Input high level IH-OE_N V Input low level IL-OE_N I Input leakage current IN-OE_N 5.6 HPD input resistor Table 13. HDP input resistor Symbol Parameter R ...
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STHDLS101 6 Application information 6.1 Power supply sequencing A proper power supply sequencing is advised for all CMOS devices recommended to always apply V or control pins. 6.2 Supply bypassing Bypass each of the V as possible, with ...
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Package mechanical data 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and ...
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STHDLS101 Figure 6. QFN- mm) package outline Package mechanical data 21/25 ...
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Package mechanical data Table 15. QFN- mm) package mechanical data Symbol ddd Figure 7. QFN-48 tape information 22/25 Millimeters Min Typ Max 0.80 0.90 1.00 0.02 ...
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STHDLS101 Figure 8. Reel information Table 16. Reel mechanical data (dimensions in mm) A 330 ± 13 0.25 100 Package mechanical data 0084694_J T 16.4 23/25 ...
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Revision history 8 Revision history Table 17. Document revision history Date 15-Apr-2008 23-Apr-2008 10-Jun-2008 01-Dec-2008 24/25 Revision 1 Initial release. 2 Modified: Figure 5. 3 Document status promoted from preliminary data to datasheet. Updated: Features section, Chapter 4 and Chapter ...
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... STHDLS101 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...