74LVC2G34GW,125 NXP Semiconductors, 74LVC2G34GW,125 Datasheet - Page 13
![IC BUFFER/DRIVER DUAL SC88-6](/photos/5/31/53138/568-umt6_sot-363_sc-88__sot363_sml.jpg)
74LVC2G34GW,125
Manufacturer Part Number
74LVC2G34GW,125
Description
IC BUFFER/DRIVER DUAL SC88-6
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC2G34GW125.pdf
(17 pages)
Specifications of 74LVC2G34GW,125
Package / Case
SC-70-6, SC-88, SOT-363
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Output Current
50 mA
Output Voltage
6.5 V
Propagation Delay Time
2.5 ns (Typ) @ 2.7 V or 2.2 ns (Typ) @ 3.3 V or 1.9 ns (Typ) @ 5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4842-2
74LVC2G34GW,125
74LVC2G34GW-G
74LVC2G34GW-G
935273783125
74LVC2G34GW,125
74LVC2G34GW-G
74LVC2G34GW-G
935273783125
NXP Semiconductors
Fig 14. Package outline SOT1202 (XSON6)
74LVC2G34
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
Rev. 5 — 2 September 2010
D
2
5
0.35
0.30
0.27
0
L
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
A
E
L
1
A
1 mm
(4×)
(2)
European
projection
74LVC2G34
© NXP B.V. 2010. All rights reserved.
Dual buffer gate
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
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