74LVT241PW,112 NXP Semiconductors, 74LVT241PW,112 Datasheet - Page 3

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74LVT241PW,112

Manufacturer Part Number
74LVT241PW,112
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT241PW,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVT241PW
74LVT241PW
935210110112
NXP Semiconductors
5. Pinning information
Table 2.
74LVT241_3
Product data sheet
Symbol
1OE
1A0 to 1A3
2A0 to 2A3
GND
1Y0 to 1Y3
2Y0 to 2Y3
2OE
V
Fig 3.
CC
Pin configuration for SO20 and (T)SSOP20
Pin description
GND
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
5.1 Pinning
5.2 Pin description
10
1
2
3
4
5
6
7
8
9
Pin
1
2, 4, 6, 8
17, 15, 13, 11
10
18, 16, 14, 12
3, 5, 7, 9
19
20
74LVT241
001aah734
20
19
18
17
16
15
14
13
12
11
V
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
CC
Rev. 03 — 7 May 2008
Description
output enable input (active LOW)
data input
data input
ground (0 V)
data output
data output
output enable input (active HIGH)
supply voltage
Fig 4.
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Pin configuration for DHVQFN20
index area
terminal 1
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
3.3 V octal buffer/line driver; 3-state
Transparent top view
2
3
4
5
6
7
8
9
74LVT241
GND
(1)
19
18
17
16
15
14
13
12
74LVT241
001aah735
© NXP B.V. 2008. All rights reserved.
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
3 of 16

Related parts for 74LVT241PW,112