TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 54

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

standby mode
Not clearing
(clearing standby mode)
Settings for generating
interrupt request signal
Settings for detection
CG detects interrupt
Interrupt generation
7.5.2
The following shows how an interrupt is handled.
In the following descriptions,
Processing
7.5.2.1
Interrupt handling
Flowchart
Clearing standby
mode
Set the NVIC registers for detecting interrupts.
Set the clock generator as well if the interrupt source is used
to clear a standby mode.
○ Common setting
○ Setting to clear standby mode
Execute an appropriate setting to send the interrupt signal
depending on the interrupt type.
○Setting for interrupt from the external pin
○Setting for interrupt from peripheral function
function for details.)
An interrupt request is generated.
Interrupt lines used for clearing a standby mode are
connected to the CPU via the clock generator.
NVIC registers
Clock generator
Port
Peripheral function (See the chapter of each peripheral
indicates hardware handling.
TMPM370 7-16
Details
indicates software handling.
Preparation
Generator
Detection
TMPM370
by Clock
7.5.2.2
7.5.2.3
Interrupt
See