TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 99

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

8.2 Port Functions
8.2.1
Control Register
and PxCR are enabled.
PB3,PB5
[When used for debug(PxFR<n>=1) and output is
enabled(PxCR<n>=1)]
PH0-2,PA0,PA2,PE4,PE6-7,PA7,PD3,PL0-1,PJ6-7,PK0-1
[When used for interrupt(PxFR<n>=1) and input is
enabled(PxIE<n>=1)]
Other ports
O：Input or Output enabled
×：Input or Output disabled
Input and output in Stop mode are enabled/disabled by the CGSTBYCR<DRVE> bit in the Standby
If PxIE or PxCR is enabled with <DRVE>=1, input or output is enabled respectively in STOP mode.
If <DRVE>=0, both input and output are disabled in STOP mode except for some ports even if PxIE
The differences are summarized in the table shown below.
Port States in Stop Mode
Port
Table 8.1 Differences of <DRVE> setting
TMPM370 8-2
Output
Output
Output
Input
Input
Input
I/O
<DRVE>=0
Disable when data
Enable when data is valid.
O
×
×
×
×
Input/Output Ports
Depends on
Depends on
Depends on
Depends on
<DRVE>=1
PxCR<n>
PxCR<n>
PxIE<n>
PxIE<n>
is invalid.
TMPM370
O