IR3086AMTR International Rectifier, IR3086AMTR Datasheet - Page 15

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IR3086AMTR

Manufacturer Part Number
IR3086AMTR
Description
XPHASE Phase IC with OVP with fault overtemp detect. The IR3086AM Phase IC combined with an IR XPhase TM Control IC provides a full featured and flexible way to implement power solutions for the latest high performance CPUs and ASICs.
Manufacturer
International Rectifier
Datasheet

Specifications of IR3086AMTR

Package
20-Lead MLPQ
Circuit
X-Phase Phase IC
Iout (a)
2.5A Gate Driver
Pbf
PbF Option Available

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Over Current Setting Resistor R
The inductor DC resistance is utilized to sense the inductor current. The copper wire of inductor has a constant
temperature coefficient of 3850 ppm/°C, and therefore the maximum inductor DCR can be calculated from Equation
(8), where R
T_
The current sense amplifier gain decreases with temperature at the rate of 1470 ppm/°C, which compensates part
of the inductor DCR increase. The phase IC die temperature is only a couple of degrees Celsius higher than the
PCB temperature due to the low thermal impedance of MLPQ package. The minimum current sense amplifier gain
at the maximum phase IC temperature T
The total input offset voltage (V
(V
sense resistors R
The over current limit is set by the external resistor R
over current limit. I
and is determined by the curve in Figure 14 of IR3081A Data Sheet. K
average current in each phase and is calculated from Equation (12).
No Load Output Voltage Setting Resistor R
A resistor between FB pin and the converter output is used to create output voltage offset V
difference between V
lowers the converter voltage by R
R
but also affected by the adaptive voltage positioning resistor R
amplifiers. R
Body Braking
The Body Braking
enabled, Resistors R
Dynamic VID step down. Usually R
FB
CS_OFST)
ROOM
is not only determined by I
Page 15 of 33
respectively.
of the amplifier itself and that created by the amplifier input bias currents flowing through the current
FB
L_MAX
TM
and R
CS+
Related Resistors R
TM
OCSET,
V
and R
R
K
R
R
G
R
CS
OCSET
DRP
FB
DRP
and R
P
during Dynamic VID can be disabled by connecting BBFB pin to ground. If the feature is
BBFB
L
CS
DAC
_
_
_
TOFST
MAX
MIN
(
V
are determined by (13) and (14) respectively.
L_ROOM
R
the bias current of OCSET pin, changes with switching frequency setting resistor R
voltage and output voltage at no load condition. Adaptive voltage positioning further
I
R
CS-
L
and R
[
FB
_
I
V
MAX
R
LIMIT
.
G
O
V
FB
n
L
CS
CS
)
_
R
O
, the current flowing out of FB pin as shown in Figure 14 of IR3081A Data Sheet,
CS_TOFST
OCSET
ROOM
BBDRP
L
_
are the inductor DCR at maximum temperature T
*I
_
V
BBFB
V
_
ROOM
OFST
n
O
O,
O
MAX
R
I
O
/(
_
L
BBFB
where R
R
I
L
NLOFST
_
/
FB
and R
IC_MAX
O
MAX
n
1 [
are needed to restore the feedback voltage of the error amplifier after
I
V
G
1 [
CSIN
) of current sense amplifier in phase ICs is the sum of input offset
I
CS
and R
R
3850
FB
L
1470
1 (
_
BBDRP
f
O
_
SW
MIN
V
is calculated from Equation (9).
MAX
and Adaptive Voltage Positioning Resistor R
CS
is the required output impedance of the converter.
*
R
K
BBDRP
*
CS
10
_
P
) 2
10
TOFST
)
are chosen to match R
OCSET
6
V
6
I
CS
CSIN
(
T
(
_
T
L
n
TOFST
as defined in Equation (11), where I
IC
_
MAX
_
R
MAX
R
O
DRP
CS
]
G
T
CS
ROOM
and total input offset voltage of current sense
T
ROOM
_
MIN
P
)]
is the ratio of inductor peak current over
)]
/
FB
I
OCSET
and R
DRP
L_MAX
respectively
(10)
(11)
(12)
(13)
(14)
and room temperature
(8)
(9)
O_NLOFST,
IR3086A
LIMIT
DRP
2/13/09
.
is the required
which is the
OSC

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