74HCT640DB,112 NXP Semiconductors, 74HCT640DB,112 Datasheet - Page 2
74HCT640DB,112
Manufacturer Part Number
74HCT640DB,112
Description
IC TRANSCEIVER 3ST 8BIT 20SSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheets
1.74HCT4046ADB112.pdf
(19 pages)
2.74HCT4046ADB112.pdf
(23 pages)
3.74HCT640D653.pdf
(6 pages)
Specifications of 74HCT640DB,112
Logic Type
Transceiver, Inverting
Package / Case
20-SSOP
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74HCT
Number Of Channels Per Chip
8
Input Level
TTL
Output Level
TTL
Output Type
3-State
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
9 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Function
Inverting
Input Bias Current (max)
8 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Inverting
Number Of Circuits
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2896-5
935190190112
935190190112
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
March 1988
t
C
C
C
PHL
Octal bidirectional bus interface
Inverting 3-state outputs
Output capability: bus driver
I
Octal bus transceiver; 3-state; inverting
I
I/O
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/
CC
PD
L
t
category: MSI
SYMBOL
= output frequency in MHz
= input frequency in MHz
(C
PLH
= output load capacitance in pF
P
is used to determine the dynamic power dissipation (P
= supply voltage in V
L
D
= C
V
amb
CC
PD
2
= 25 C; t
V
f
o
CC
) = sum of outputs
propagation delay
input capacitance
input/output capacitance
power dissipation capacitance
per transceiver
2
A
B
n
n
to B
to A
f
r
i
= t
+
I
I
f
n
n
= GND to V
= GND to V
;
= 6 ns
PARAMETER
(C
L
V
CC
2
CC
CC
f
o
) where:
1.5 V
C
notes 1 and 2
L
2
.
= 15 pF; V
GENERAL DESCRIPTION
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
D
in W):
CONDITIONS
CC
= 5 V
9
3.5
10
35
HC
TYPICAL
74HC/HCT640
Product specification
9
3.5
10
35
HCT
ns
pF
pF
pF
UNIT