M48T02 STMicroelectronics, M48T02 Datasheet
M48T02
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M48T02 Summary of contents
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... Typical clock accuracy of ±1 minute a month, at 25°C ■ Software controlled clock calibration for high accuracy applications ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages (V = Power-fail deselect voltage): PFD – M48T02 4.75 to 5.5V CC 4.5V ≤ V ≤ 4.75V PFD – M48T12 4.5 to 5.5V CC 4.2V ≤ V ≤ 4.5V PFD ■ ...
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Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... The M48T02/ non-volatile pin and function equivalent to any JEDEC standard 2Kb x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed ...
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... CLOCK CHAIN 32,768 Hz CRYSTAL LITHIUM CELL VOLTAGE SENSE SWITCHING 6/ M48T02 19 A10 M48T12 DQ7 DQ0 9 16 DQ6 DQ1 10 15 DQ5 DQ2 11 14 DQ4 DQ3 AI01028 POWER ...
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... SO 2.1 Read mode The M48T02/ the READ Mode whenever W (WRITE Enable) is high and E (Chip Enable) is low. The device architecture allows ripple-through access of data from eight of 16,384 locations in the static storage array. Thus, the unique address specified by the 11 Address Inputs defines which one of the 2,048 bytes of data accessed. Valid data will be available at the Data I/O pins within Address Access time (t address input signal is stable, providing that the E and G access times are also satisfied ...
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... Min Max 70° 4.75 to 5.5V or 4.5 to 5.5V (except where noted AVQV tAXQX tEHQZ tGHQZ VALID AI01330 M48T02/M48T12 –150 –200 Min Max Min Max 150 200 70 150 200 70 150 200 ...
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... Write mode The M48T02/ the WRITE Mode whenever W and E are active. The start of a WRITE is referenced from the latter occurring falling edge WRITE is terminated by the earlier rising edge The addresses must be held valid throughout the cycle must return high for a minimum of t prior to the initiation of another READ or WRITE cycle ...
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... RAM's content. At voltages below V user can be assured the memory will write protected state, provided the V is not less than t . The M48T02/12 may respond to transient noise spikes into the deselect window during the time the device is sampling V of the power supply lines is recommended ...
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Figure 7. Checking the BOK flag status AT ANY ADDRESS COMPLEMENT BACK TO SAME ADDRESS ADDRESS AGAIN (BATTERY OK) WRITE ORIGINAL SAME ADDRESS POWER-UP READ DATA WRITE DATA READ DATA AT SAME IS DATA NO (BATTERY LOW) COMPLEMENT OF FIRST ...
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Clock operations 3.1 Reading the clock Updates to the TIMEKEEPER prevent reading data in transition. The BiPORT™ TIMEKEEPER cells in the RAM array are only data registers and not the actual clock counters, so updating the registers can be ...
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... Calibrating the clock The M48T02/12 is driven by a quartz-controlled oscillator with a nominal frequency of 32,768 Hz. A typical M48T02/12 is accurate within 1 minute per month at 25°C without calibration. The devices are tested not to exceed ± 35 ppm (parts per million) oscillator frequency error at 25°C, which equates to about ±1.53 minutes per month. ...
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... The FT Bit must be set using the same method used to set the clock: using the WRITE Bit. The LSB of the Seconds Register is monitored by holding the M48T02/ extended READ of the Seconds Register, but without having the READ Bit set. The FT Bit MUST be reset to '0' for normal clock operations to resume ...
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Figure 8. Crystal accuracy across temperature ppm 20 0 -20 -40 -60 -80 -100 0 5 Figure 9. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 3.5 V noise and negative going transients CC I transients, including those produced by output ...
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V 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount. Figure 10. Supply voltage protection 16/ (cathode connected 0.1μ anode ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 6. ...
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... Figure 11. AC testing load circuit Table 8. Capacitance Symbol C Input Capacitance IN (3) C Input / Output Capacitance IO 1. Effective capacitance measured with power supply at 5V. Sampled only, not 100% tested 25° 1MHz. 3. Outputs deselected. 18/24 M48T02 ) 4. 100 L ≤ 1.5 DEVICE UNDER TEST 1kΩ ...
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Table 9. DC characteristics Symbol Parameter I Input Leakage Current LI (2) I Output Leakage Current LO I Supply Current CC (3) I Supply Current (Standby) TTL CC1 (3) I Supply Current (Standby) CMOS CC2 V Input Low Voltage IL ...
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... PFD CC before Power 70° (min) fall time of less than tF may result in deselection/write protection not occurring passes V (min). PFD may cause corruption of RAM data. FB (1)(2) Parameter M48T02 M48T12 . 70° Min Max 0 300 4.75 to 5.5V or 4.5 to 5.5V (except where ...
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Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner ...
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... 4.5 to 5.5V Speed –70 = 100ns (M48T02/12) –150 = 150ns (M48T02/12) –200 = 200ns (M48T02/12) Package PC = PCDIP24 Temperature range 70°C Shipping method blank = ECOPACK package, tubes For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you. ...
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Revision history Table 14. Document revision history Date Revision Jul-2000 1.0 13-Jul-2000 1.1 07-May-2001 2.0 14-May-01 2.1 16-Jul-2001 2.2 20-May-2002 2.3 26-Jun-2002 2.4 28-Mar-2003 3.0 31-Mar-2004 4.0 12-Dec-2005 5.0 21-Sep-2007 First issue t change (Table 10) rec Reformatted; temp. ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...