TB28F400B5-T80 Intel Corporation, TB28F400B5-T80 Datasheet
TB28F400B5-T80
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TB28F400B5-T80 Summary of contents
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SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 28F200B5, 28F400B5, 28F800B5 n SmartVoltage Technology Smart 5 Flash: 5V Reads 12V Writes Increased Programming Throughput at 12V Very High-Performance Read 2-, 4-Mbit Access Time 8-Mbit: ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 7641 Mt. Prospect, IL 60056-7641 or call 1-800-879-4683 COPYRIGHT © INTEL CORPORATION, 1996 CG-041493 ...
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INTRODUCTION ............................................. 5 1.1 New Features in the Smart 5 Memory Products ..................................................... 5 1.2 Product Overview ........................................ 5 2.0 PRODUCT DESCRIPTION.............................. 6 2.1 Pin Descriptions........................................... 6 2.2 Pinouts......................................................... 8 2.3 Memory Blocking Organization .................. 10 2.3.1 Boot Block........................................... ...
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SMART 5 BOOT BLOCK MEMORY FAMILY REVISION HISTORY Number -001 Original Version -002 Minor changes throughout document. Section 3.1.5 and Figure 13 redone to clarify program/erase operation abort. Information added to Table 2, Figure 1, and Section 3.3 to clarify ...
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INTRODUCTION This datasheet contains specifications for 2-, 4-, and 8-Mbit Smart 5 boot block flash memories. Section 1 provides a feature overview. Sections 2, 3, and 4 describe the product and functionality. Section 5 details the electrical and timing ...
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SMART 5 BOOT BLOCK MEMORY FAMILY SmartVoltage technology enables fast factory programming and low-power designs. Specifically designed for 5V systems, Smart 5 components support read operations and internally CC configure to program/erase 12V. The ...
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Table 2. Pin Descriptions Symbol Type ADDRESS INPUTS for memory addresses. Addresses are internally latched A –A INPUT 0 18 during a write cycle. 28F200: A[0-16], 28F400: A[0-17], 28F800: A[0-18] A INPUT ADDRESS INPUT: When A 9 this mode, A ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 2. Pin Descriptions (Continued) Symbol Type WP# INPUT WRITE PROTECT: Provides a method for unlocking the boot block with a logic level signal in a system without a 12V supply. When WP# is ...
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WP# WP ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 2.3 Memory Blocking Organization The boot block product family features asymmetrically-blocked architecture system memory integration. Each erase block can be erased independently of the others up to 100,000 times for commercial temperature or up ...
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BOOT BLOCK 1E000H 3E000H 3DFFFH 1DFFFH 8-Kbyte PARAMETER BLOCK 1D000H 3D000H 3CFFFH 1CFFFH 8-Kbyte PARAMETER BLOCK 1C000H 3C000H 1BFFFH 3BFFFH 96-Kbyte MAIN BLOCK 10000H 30000H 2FFFFH 0FFFFH 128-Kbyte MAIN BLOCK 20000H 00000H 1FFFFH 10000H 0FFFFH 00000H ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 28F200-T 7FFFFH 3FFFFH 16-Kbyte BOOT BLOCK 7C000H 3C000H 7BFFFH 3BFFFH 8-Kbyte PARAMETER BLOCK 7A000H 3A000H 79FFFH 39FFFH 8-Kbyte PARAMETER BLOCK 78000H 38000H 77FFFH 37FFFH 96-Kbyte MAIN BLOCK 60000H 20000H 5FFFFH 1FFFFH 128-Kbyte MAIN BLOCK ...
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PRINCIPLES OF OPERATION The system processor accesses the Smart 5 boot block memories through the Command User Interface (CUI), which accepts commands written with standard microprocessor write timings and TTL-level control inputs. The flash can be switched into each ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.1.2 OUTPUT DISABLE With OE logic-high level (V ), the device IH outputs are disabled. Output pins DQ –DQ 0 placed in a high-impedance state. 3.1.3 STANDBY Deselecting the device by bringing ...
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Table 3. Bus Operations for Word-Wide Mode (BYTE Mode Notes RP# Read 1,2 Output Disable V IH Standby V IH Deep Power-Down Intelligent Identifier (Mfr.) Intelligent Identifier 4 ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.2 Modes of Operation The flash memory has three read modes and two write modes. The read modes are read array, read identifier, and read status. The write modes are program and block erase. ...
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Status Register to determine if an error occurred during the series. Issue the Clear Status Register command (50H) to clear the status register. It functions ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 6. Command Codes and Descriptions Code Device Mode 00 Invalid/ Unassigned commands that should not be used. Intel reserves the right to redefine Reserved these codes for future functions. FF Read Array Places ...
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Table 6. Command Codes and Descriptions (Continued) Code Device Mode 50 Clear Status The WSM can only set the Program Status and Erase Status bits in the status Register register to “1”; it cannot clear them to “0.” The status ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 8. Status Register Bit Definition WSMS ESS SR.7 WRITE STATE MACHINE STATUS 1 = Ready 0 = Busy SR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = ...
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Start Write 40H, Word/Byte Address Write Word/Byte Data/Address Read Status Register NO SR YES Full Status Check if Desired Word/Byte Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Start Write 20H, Block Address Write D0H and Block Address Read Status Register Suspend Erase Loop NO 0 YES Suspend SR.7 = Erase 1 Full Status Check if Desired Block Erase Complete FULL STATUS ...
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Start Write B0H Read Status Register 0 SR Erase Completed CSR Write FFH Read Array Data NO Done Reading YES Write D0H Write FFH Erase Resumed Read Array Data Figure 9. Erase Suspend/Resume Flowchart PRODUCT ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.3 Boot Block Locking The boot block family architecture features a hardware-lockable boot block so that the kernel code for the system can be kept secure while the parameter and main blocks are programmed ...
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STANDBY POWER When CE logic-high level (V ), and the IH device is not programming or erasing, the memory enters in standby mode, which disables much of the device’s circuitry and substantially reduces power consumption. Outputs ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 5.0 SPECIFICATIONS 5.1 Absolute Maximum Ratings* Commercial Operating Temperature During Read/Erase/Program ........0°C to +70°C Temperature Under Bias ..........–10°C to +80°C Extended Operating Temperature During Read/Erase/Program ....–40°C to +85°C Temperature Under Bias ..........–40°C to +85°C ...
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Operating Conditions Table 10. Temperature and V Symbol Parameter T Commercial Operating Temperature A Extended Operating Temperature Supply Voltage (10 Supply Voltage (5 Supply Voltage (10 ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 5.6 Electrical Specifications Table 12. DC Characteristics (Commercial and Extended Temperature) Temp Sym Parameter Note Typ Max Typ Max Unit I Input Load Current Output Leakage Current ...
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Table 12. DC Characteristics (Commercial and Extended Temperature) (Continued) Temp Sym Parameter Note V A Intelligent Identifier 9 ID Voltage V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage Output High Voltage ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 14. AC Characteristics: Read Operations (Commercial and Extended Temperature) # Sym Parameter t Read Cycle 2-, 4-Mbit R1 AVAV Time 8-Mbit R2 t Address to 2-, 4-Mbit AVQV Output Delay 8-Mbit R3 t ...
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Device and Address Selection V IH ADDRESSES (A) Address Stable CE# ( OE# ( WE# ( High Z DATA (D/ ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 15. AC Characteristics: Write Operations (Commercial and Extended Temperature) # Sym RP# High Recovery to WE# (CE#) Going PHWL PHEL Low CE# (WE#) Setup to ...
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ADDRESSES [ CE#(WE#) [E(W OE# [ WE#(CE#) [W(E High Z DATA [D/ ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 16. Erase and Program Timings, V Temp V PP Parameter Boot/Parameter Block Erase Time Main Block Erase Time Main Block Write Time (Byte Mode) Main Block Write Time (Word Mode) Byte Program Time ...
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... PA28F400B5T60 PA28F400B5B60 PA28F400B5T80 PA28F400B5B80 8M PA28F800B5T70 PA28F800B5B70 PA28F800B5T90 PA28F800B5B90 Extended 2M TB28F200B5T80 TB28F200B5B80 4M TB28F400B5T80 TB28F400B5B80 8M TB28F800B5T90 TB28F800B5B90 PRODUCT PREVIEW SMART 5 BOOT BLOCK MEMORY FAMILY APPENDIX Access Speed , Top Boot B = Bottom Boot Voltage Options ( Architecture B = Boot Block ...
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SMART 5 BOOT BLOCK MEMORY FAMILY WRITE STATE MACHINE: CURRENT-NEXT STATE Write State Machine Current/Next States Current SR.7 Data Read Program State When Array Setup Read (FFH) (10/40H) Read Read Program Array “1” Array Array Setup Program Setup “1” Status ...
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APPENDIX C PRODUCT BLOCK DIAGRAM PRODUCT PREVIEW SMART 5 BOOT BLOCK MEMORY FAMILY 7769_01 37 ...
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SMART 5 BOOT BLOCK MEMORY FAMILY ADDITIONAL INFORMATION Order Number AB-65 Migrating SmartVoltage Boot Block Flash Designs to Smart 5 Flash 292194 292154 AB-60 SmartVoltage Boot Block Flash Memory Family Overview 2-Mbit SmartVoltage Boot Block Flash Memory Family Datasheet 290531 ...