74LVC126APW,112 NXP Semiconductors, 74LVC126APW,112 Datasheet - Page 4
![IC BUFF DVR TRI-ST QD 14TSSOP](/photos/6/58/65814/568-14-tssop_sot402-1_sml.jpg)
74LVC126APW,112
Manufacturer Part Number
74LVC126APW,112
Description
IC BUFF DVR TRI-ST QD 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC126ABQ115.pdf
(20 pages)
Specifications of 74LVC126APW,112
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Logic Family
LVC
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 4
Output Type
3-State
Propagation Delay Time
2.7 ns at 2.7 V, 2.4 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC126APW
74LVC126APW
935241120112
74LVC126APW
935241120112
Philips Semiconductors
2003 Feb 28
handbook, halfpage
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
Fig.1 Pin configuration SO14 and (T)SSOP14.
GND
1OE
2OE
1A
1Y
2A
2Y
Fig.3 Logic symbol.
10
12
13
2
1
5
4
9
1
2
3
4
5
6
7
1OE
2OE
3OE
4OE
1A
2A
3A
4A
126
MNA233
MNA235
1Y
2Y
3Y
4Y
14
13
12
11
10
9
8
11
3
6
8
V CC
4OE
4A
4Y
3OE
3A
3Y
4
handbook, halfpage
handbook, halfpage
* The die substrate is attached to this pad using conductive die attach
material. It can not be used as a supply pin or input.
2OE
Fig.2 Pin configuration DHVQFN14.
1A
1Y
2A
2Y
Fig.4 Logic symbol (IEEE/IEC).
Top view
2
3
4
5
6
10
12
13
2
1
5
4
9
GND
1OE
EN1
7
1
GND
MNA236
V CC
1
(1)
3Y
14
8
11
Product specification
MCE197
74LVC126A
3
6
8
13
12
11
10
9
4OE
4A
4Y
3OE
3A