74LVCH244ADB,112 NXP Semiconductors, 74LVCH244ADB,112 Datasheet - Page 10
![IC BUFF/DVR TRI-ST DUAL 20SSOP](/photos/6/52/65221/20-ssop_sot339-1_sml.jpg)
74LVCH244ADB,112
Manufacturer Part Number
74LVCH244ADB,112
Description
IC BUFF/DVR TRI-ST DUAL 20SSOP
Manufacturer
NXP Semiconductors
Series
74LVCHr
Datasheet
1.74LVC244APW118.pdf
(18 pages)
Specifications of 74LVCH244ADB,112
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Logic Family
LVC
Number Of Channels Per Chip
8
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 8
Output Type
3-State
Propagation Delay Time
2.8 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVCH244ADB
74LVCH244ADB
935210340112
74LVCH244ADB
935210340112
NXP Semiconductors
Table 9.
[1]
74LVC_LVCH244A_6
Product data sheet
Supply voltage
1.2 V
2.7 V
3.0 V to 3.6 V
Fig 8.
The circuit performs better when R
Test data is given in
Definitions for test circuit:
R
C
R
V
Test circuit for measuring switching times
EXT
L
L
T
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
= External voltage for measuring switching times.
Input
V
V
2.7 V
2.7 V
I
CC
Table
9.
negative
L
positive
= 1 k .
pulse
pulse
0 V
0 V
V
V
t
r
I
I
, t
2.5 ns
2.5 ns
2.5 ns
G
f
90 %
10 %
Rev. 06 — 13 August 2009
V
I
t
t
f
r
V
V
M
M
10 %
90 %
Load
C
50 pF
50 pF
50 pF
R T
L
V
DUT
CC
74LVC244A; 74LVCH244A
t
t
W
W
V
O
R
500
500
500
o
L
of the pulse generator.
C L
[1]
V
V
M
M
001aae331
t
t
V
r
f
EXT
R L
R L
V
t
open
open
open
PLH
EXT
, t
Octal buffer/line driver; 3-state
PHL
t
2
2
2
PLZ
V
V
V
, t
CC
CC
CC
PZL
© NXP B.V. 2009. All rights reserved.
t
GND
GND
GND
PHZ
, t
10 of 18
PZH