74HCT2G126DC,125 NXP Semiconductors, 74HCT2G126DC,125 Datasheet - Page 6

IC BUFF DVR TRI-ST DL 8VSSOP

74HCT2G126DC,125

Manufacturer Part Number
74HCT2G126DC,125
Description
IC BUFF DVR TRI-ST DL 8VSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G126DC,125

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
US8, 8-VSSOP
Logic Family
HCT
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 2
Output Type
3-State
Propagation Delay Time
15 ns at 4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HCT2G126DC-G
74HCT2G126DC-G
935274717125
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); C
[1]
[2]
[3]
74HC_HCT2G126_4
Product data sheet
Symbol Parameter
t
t
t
C
74HCT2G126
t
t
t
t
C
en
dis
t
pd
en
dis
t
PD
PD
All typical values are measured at T
t
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
pd
en
dis
t
i
o
(C
D
CC
PD
= input frequency in MHz;
L
is the same as t
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
enable time
disable time nOE to nY; see
transition
time
power
dissipation
capacitance
propagation
delay
enable time
disable time nOE to nY; see
transition
time
power
dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of outputs.
THL
PLH
PZL
f
PLZ
i
and t
Conditions
nOE to nY; see
nY; see
per buffer; V
nA to nY; see
nOE to nY; see
V
V
nY; see
per buffer;
V
and t
N + (C
and t
and t
CC
CC
I
V
V
V
V
V
V
V
V
V
output enabled
output disabled
V
V
output enabled
output disabled
= GND to V
TLH
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
PZH
= 4.5 V
= 4.5 V
PHL
PHZ
.
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 4.5 V
= 5.0 V; C
L
.
.
.
Figure 6
Figure
V
CC
amb
I
= GND to V
2
…continued
Figure 6
CC
= 25 C.
6; V
Figure 7
Figure 7
Figure
Figure
f
L
o
) where:
= 15 pF
1.5 V
CC
= 4.5 V
7;
7;
Rev. 04 — 24 September 2009
CC
L
= 50 pF unless otherwise specified; for test circuit see
D
in W).
[2]
[2]
[2]
[3]
[2]
[2]
[2]
[2]
[3]
74HC2G126; 74HCT2G126
T
Min
amb
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
= 40 C to +85 C T
Typ
40
11
25
12
10
18
11
15
12
11
11
11
8
6
5
1
6
1
[1]
Max
115
125
23
20
25
21
75
15
13
30
31
35
15
-
-
-
-
-
Dual buffer/line driver; 3-state
amb
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
= 40 C to +125 C Unit
© NXP B.V. 2009. All rights reserved.
Figure
Max
135
150
27
23
30
26
90
18
15
36
38
42
18
-
-
-
-
-
8.
6 of 14
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
ns
ns
ns
ns
ns
pF
pF

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