74LVC3G17GM,125 NXP Semiconductors, 74LVC3G17GM,125 Datasheet - Page 12

• Manufacturer Part Number: 74LVC3G17GM,125
• Description: IC BUFF SCHMT TRG TRPL 8XQFN
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC3G17GM,125

• Package / Case: 8-XQFN
• Logic Type: Schmitt Trigger - Buffer, Driver
• Number Of Elements: 3
• Number Of Bits Per Element: 1
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: LVC
• Number Of Channels Per Chip: 3
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 32 mA
• Input Bias Current (max): 40 uA
• Low Level Output Current: 32 mA
• Minimum Operating Temperature: - 40 C
• Propagation Delay Time: 3.8 ns (Typ) @ 2.7 V or 3.6 ns (Typ) @ 3.3 V or 2.7 ns (Typ) @ 5 V
• Number Of Lines (input / Output): 3 / 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC3G17GM-G; 74LVC3G17GM-G; 935277249125

NXP Semiconductors
16. Package outline
Fig 14. Package outline SOT505-2 (TSSOP8)
74LVC3G17
Product data sheet
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT505-2
max.
1.1
A
0.15
0.00
A 1
8
1
0.95
0.75
A 2
y
pin 1 index
IEC
e
Z
0.25
A 3
D
0.38
0.22
b p
b p
All information provided in this document is subject to legal disclaimers.
0
5
0.18
0.08
4
JEDEC
c
- - -
w
REFERENCES
D
3.1
2.9
Rev. 7 — 4 November 2010
M
(1)
E
3.1
2.9
Triple non-inverting Schmitt trigger with 5 V tolerant input
(1)
c
JEITA
scale
0.65
2.5
e
A
H E
4.1
3.9
A 2
A 1
0.5
L
H E
E
5 mm
0.47
0.33
detail X
L p
0.2
v
L
L p
PROJECTION
EUROPEAN
0.13
w
A
(A 3 )
74LVC3G17
0.1
y
X
v
θ
M
0.70
0.35
Z
© NXP B.V. 2010. All rights reserved.
A
(1)
ISSUE DATE
02-01-16
8°
0°
θ
SOT505-2
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