74LVT652PW,118 NXP Semiconductors, 74LVT652PW,118 Datasheet - Page 4

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74LVT652PW,118

Manufacturer Part Number
74LVT652PW,118
Description
IC TRANSCVR 8BIT N-INV 24TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT652PW,118

Logic Type
Transceiver, Non-Inverting
Package / Case
24-TSSOP
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
LVT
Number Of Channels Per Chip
8
Input Level
LVTTL
Output Level
LVTTL
Output Type
3-State
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Propagation Delay Time
3.7 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Function
Bus Transceiver / Register
Input Bias Current (max)
12000 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Number Of Circuits
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVT652PW-T
74LVT652PW-T
935177740118
Philips Semiconductors
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74LVT652.
FUNCTION TABLE
H = High voltage level
L = Low voltage level
X = Don’t care
*
**
1998 Feb 19
3.3V Octal transceiver/register, non-inverting
(3-State)
OEAB
= Low-to-High clock transition
REAL TIME BUS TRANSFER
OEAB OEBA CPAB CPBA SAB SBA
X
H
H
H
H
L
L
L
L
L
L
L
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
A
BUS B TO BUS A
L
OEBA
X
H
H
H
H
X
H
H
L
L
L
L
X
X
CPAB
H or L
H or L
H or L
H or L
INPUTS
X
X
X
B
L
CPBA
H or L
H or L
H or L
H or L
REAL TIME BUS TRANSFER
OEAB OEBA CPAB CPBA SAB SBA
X
X
X
H
A
BUS A TO BUS B
H
SAB
**
X
X
X
X
X
X
X
H
H
X
L
X
SBA
**
X
X
X
X
X
H
X
X
H
L
L
B
Unspecified**
X
Output*
Output
Output
Input
Input
Input
4
An
OEAB OEBA CPAB CPBA SAB SBA
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
DATA I/O
X
L
L
A
A, B, OR A AND B
STORAGE FROM
H
H
X
Unspecified**
Output*
Output
Output
Input
Input
Input
X
Bn
X
X
X
X
Isolation
Store A and B data
Store A, Hold B
Store A in both registers
Hold A, Store B
Store B in both registers
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Store A data to B bus
Stored A data to B bus
Stored B data to A bus
B
X
X
X
OEAB OEBA CPAB CPBA SAB SBA
OPERATING MODE
OPERATING MODE
TRANSFER STORED DATA
H
A
L
TO A OR B
H | L H | L
74LVT652
Product specification
H
SV00055
B
H

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