SD1010-1099A N/A, SD1010-1099A Datasheet - Page 25

• Manufacturer Part Number: SD1010-1099A
• Description: Analog-Interface XGA TFT LCD Display Controller
• Manufacturer: N/A

November, 1999
Revision B
Mode 640x350
Sync Polarity
SmartASIC, Inc.
Mode 640x400
Mode 720x400
Mode 640x480
Mode 800x600
Mode 832x624
Res0 threshold
Res0 threshold
Res1 threshold
Res1 threshold
Res2 threshold
Res2 threshold
Res3 threshold
Res3 threshold
Res4 threshold
Res4 threshold
Res5 threshold
Control byte 2
Sync Polarity
Sync Polarity
Sync Polarity
Sync Polarity
Sync Polarity
[10:8]
[10:8]
[10:8]
[10:8]
[10:8]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
8
2
3
8
2
3
8
2
3
8
2
3
8
2
3
8
2
3
20BH[5:4] The polarity of input synchronization signals.
20BH[2:0] Upper bound of the line number for 800x600 mode
20DH[5:4] The polarity of input synchronization signals.
20DH[2:0] Upper bound of the line number for 832x624 mode
203H[5:4] The polarity of input synchronization signals.
203H[2:0] Upper bound of the line number for 640x350 mode
205H[5:4] The polarity of input synchronization signals.
205H[2:0] Upper bound of the line number for 640x400 mode
207H[5:4] The polarity of input synchronization signals.
207H[2:0] Upper bound of the line number for 720x400 mode
209H[5:4] The polarity of input synchronization signals.
209H[2:0] Upper bound of the line number for 640x480 mode
20AH
20CH
202H
204H
206H
208H
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Bit3: fixed at 0 (reserved)
Bit4: 0: YUV input format is unsigned (128 offset)
Bit5: 0: RGB input for video mode
Bit6: 0: disable video input
Bit7: 0: disable decimation support
Bit 0: 0: don’t invert input odd/even field indicator
Bit 1: fixed at 0 (reserved)
Bit 2: 0: disable BY2 for auto calibration
Bit 4: 0: disable BY8 for auto calibration
Bit7-5: output clock phase adjustment, larger number
gives larger phase delay.
Bit 0 is for VSYNC and bit 1 is for HSYNC
Upper bound of the line number for 640x350 mode, and
lower bound for 640x400
Bit 0 is for VSYNC and bit 1 is for HSYNC
Upper bound of the line number for 640x400 mode, and
lower bound for 720x400
Bit 0 is for VSYNC and bit 1 is for HSYNC
Upper bound of the line number for 720x400 mode, and
lower bound for 640x480
Bit 0 is for VSYNC and bit 1 is for HSYNC
Upper bound of the line number for 640x480 mode, and
lower bound for 800x600
Bit 0 is for VSYNC and bit 1 is for HSYNC
Upper bound of the line number for 800x600 mode, and
lower bound for 832x624
Bit 0 is for VSYNC and bit 1 is for HSYNC
Bit 3: 0: disable BY4 for auto calibration
1: YUV input format is signed
1: YUV input for video mode
1: enable video input
1: enable decimation
1: enable BY 2 for auto calibration
1: enable BY 4 for auto calibration
1: enable BY 8 for auto calibration
1: invert input odd/even field indicator
SD1010A
25