SD1010-1099A N/A, SD1010-1099A Datasheet - Page 6

• Manufacturer Part Number: SD1010-1099A
• Description: Analog-Interface XGA TFT LCD Display Controller
• Manufacturer: N/A

Table 1: SD1010 pin description (sorted by pin number)
November, 1999
Revision B
SmartASIC, Inc.
DCLK_OUT
CLK_1M_O
R_OUT0_O
R_OUT1_O
R_OUT2_O
R_OUT3_O
PWM_CTL
R_OUT0_E
R_OUT1_E
R_OUT2_E
R_OUT3_E
R_OUT4_E
R_OUT5_E
R_OUT6_E
R_OUT7_E
ROM_SDA
ROM_SCL
HSYNC_O
VSYNC_O
HSYNC_X
SCAN_EN
CPU_SDA
CPU_SCL
RESET_B
TEST_EN
CLK_1M
DE_OUT
EN_OSD
Symbol
G_OSD
VCLK0
VCLK1
R_OSD
B_OSD
FCLK0
FCLK1
GND
VDD
GND
VDD
GND
PIN Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
SmartASIC Confidential
I/O
I/O SDA in I
I/O SDA in I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
SCL in I
Ground
SCL in I
PWM control signal (Detail description in PWM
Operation Section)
Free Running Clock (default: 1MHz)
Power Supply
Feedback of free Running Clock
System Reset ( active LOW)
OSD Color Red
OSD Color Green
OSD Color Blue
OSD Mixer Enable
=0, No OSD output
=1,R_OUT[7:0]= {R_OSD repeat 8 times}
Manufacturing test pin (NC)
Manufacturing test pin (NC)
Input PLL Feedback Clock
Input Clock 0
Output PLL Feedback Clock
Output PLL Output Clock
Output HSYNC (the polarity is programmable through
CPU, default is active low)
Output VSYNC (the polarity is programmable through
CPU, default is active low)
Output Clock to Control Panel (the polarity is
programmable through CPU)
Output Display Enable for Panel (the polarity is
programmable through CPU, default is active HIGH)
Ground
Power Supply
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Default HSYNC generated by ASIC (active LOW)
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Output Color Red Even Pixel (left pixel)
Ground
Output Color Red Odd Pixel (right pixel)
Output Color Red Odd Pixel (right pixel)
Output Color Red Odd Pixel (right pixel)
Output Color Red Odd Pixel (right pixel)
G_OUT[7:0]= {G_OSD repeat 8 times }
B_OUT[7:0]= {B_OSD repeat 8 times }
2
2
2
2
C for EEPROM interface
C for CPU interface
C for EEPROM interface
C for CPU interface
Description
SD1010A
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