A43L0616AV-5.5 AMIC Technology, Corp., A43L0616AV-5.5 Datasheet - Page 28

• Manufacturer Part Number: A43L0616AV-5.5
• Description: 5.5ns 183MHz CL=3 512K x 16-Bit x 2banks synchronous DRAM
• Manufacturer: AMIC Technology, Corp.

Page Read Cycle at Different Bank @Burst Length = 4
(May, 2001, Version 1.0)
CLOCK
A10/AP
ADDR
(CL=2)
(CL=3)
CKE
RAS
CAS
DQM
DQ
DQ
CS
WE
BA
*Note 1
0
* Note : 1.
Row Active
(A-Bank)
RAa
RAa
1
2. To interrupt a burst read by row precharge, both the read ad the precharge banks must be the same.
CS
2
can be don’t care when
3
(A-Bank)
Read
CAa
4
Row Active
(B-Bank)
RBb
RBb
5
QAa0 QAa1 QAa2 QAa3
6
RAS
QAa0 QAa1 QAa2 QAa3
7
,
(B-Bank)
CAS
Read
CBb
8
and
9
27
WE
High
QBb0
10
are high at the clock high going edge.
QBb1
QBb0
11
(A-Bank)
QBb2 QBb3 QAc0 QAc1 QBd0 QBd1 QAe0 QAe1
QBb1
Read
CAc
12
QBb2 QBb3 QAc0 QAc1 QBd0 QBd1 QAe0 QAe1
13
(B-Bank)
Read
CBd
14
AMIC Technology, Inc.
15
(A-Bank)
Read
CAe
16
A43L0616A
17
Precharge
(A-Bank)
: Don't care
18
*Note 2
19