A43L0616AV-5.5 AMIC Technology, Corp., A43L0616AV-5.5 Datasheet - Page 35

• Manufacturer Part Number: A43L0616AV-5.5
• Description: 5.5ns 183MHz CL=3 512K x 16-Bit x 2banks synchronous DRAM
• Manufacturer: AMIC Technology, Corp.

Write Interrupted by Precharge Command & Write Burst Stop Cycle (@ Burst Length = Full Page)
(May, 2001, Version 1.0)
CLOCK
A10/AP
ADDR
CKE
RAS
CAS
DQM
CS
BA
DQ
WE
* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.
0
Row Active
(A-Bank)
RAa
RAa
1
2. Data-in at the cycle of burst stop command cannot be written into corresponding memory cell.
3. Data-in at the cycle of interrupted by precharge cannot be written into the corresponding memory cell.
4. Burst stop is valid only at every burst length.
It is defined by AC parameter of tBDL(=1CLK).
It is defined by AC parameter of tRDL(=2CLK).
DQM at write interrupted by precharge command is needed to ensure tRDL of 2CLK.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
Input data after Row precharge cycle will be masked internally.
2
3
(A-Bank)
* Note 1
Write
DAa0
CAa
4
DAa1
5
DAa2
6
DAa3
7
DAa4
* Note 2
8
t
Burst Stop
BDL
9
34
High
10
* Note 1
(A-Bank)
DAb0 DAb1 DAb2 DAb3
Write
CAb
11
12
13
14
AMIC Technology, Inc.
DAb4 DAb5
15
* Note 3
16
t
RDL
A43L0616A
17
Precharge
(A-Bank)
18
: Don't care
19